With a proven physical design flow (RTL to GDSII, DFT, DFM), methodologies, and with dedicated subject matter experts, eInfochips has provided silicon turnkey design service to many clients for successful silicon tape-outs. We were the 1st engineering services company to tape-out multiple 16nm SoCs and at present, we are working on 10nm and 7nm ASIC technology node. These SoCs have 300 million to 500 million gates (~25*25 mm) and were developed with the focus on reducing the die size and power.
We have recently started working on 5nm as well. We have delivered multiple tape-outs to leading foundries including TSMC, UMC, GF, Toshiba, TI, and SMIC. We also offer DFM (Design for manufacturability)/DFT (Design for testing) and silicon turnkey design services for startups and tier-2 companies.
Why eInfochips for Specification to Silicon Services?
Complete Silicon Turnkey Solutions Ownership: 100+ Silicon Tape-outs across 180 to 16nm
First engineering services company to tapeout multiple 16nm SoC’s with:
-300 to 500 million gates
-Large die size (~25*25 mm)
-200 Watts Power consumption
Flexible DFT engagement model starting from DFT Architecture to Silicon Turn-on
40+ successful ASIC/SoC DFT-DFM silicon bringup
Looking for end-to-end silicon turnkey design services and support?