Blogs - Semiconductor

May 18, 2020

5G Drones – Eye In The Sky – Helping To Fight Against COVID-19

In the current situation of a global pandemic, staying connected is important but also difficult.

Blog
January 20, 2020

Creating IP level test cases which can be reused at SoC level

There can be multiple reasons that can block the test cases to be executed, it

Blog
November 7, 2019

7 Tools to be considered in DFT Flow for IoT Device Design

Fortune Business Insight predicts that the global Internet of Things (IoT) market will expand from

Blog
August 28, 2019

Why can’t the Semiconductor Industry afford to take its Eyes off SerDes?

In this era of pervasive connectivity, everything needs to communicate with each other and everything

Blog
August 14, 2019

Top 5 Solutions for Optimal DFT (Design for Testability) in Lower Technology Nodes

Design for Testability (DFT), is one of the effective ways to overcome power consumption challenges

Blog
June 18, 2019

Powering Design Innovations with Lower Technology Nodes at 7nm and Beyond [Infographic]

The developments in the past in chip design laid the foundation for lower technology nodes

Blog
June 4, 2019

ASIC Design Flow in VLSI Engineering Services – A Quick Guide

The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.

Blog
May 29, 2019

How Formal Verification Alleviates the Dark Sides of RISC-V Cores?

Verification is the process of reviewing, inspecting, or testing hardware design in order to get

Blog
April 26, 2019

Signoff Iteration Reduction Technique for Fixing Top Level Antenna

While developing large-sized chips, “divide & conquer” techniques are used. This involves partitioning the design,

Blog

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