In this era of pervasive connectivity, everything needs to communicate with each other and everything

Design for Testability (DFT), is one of the effective ways to overcome power consumption challenges

The developments in the past in chip design laid the foundation for lower technology nodes

The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.

Verification is the process of reviewing, inspecting, or testing hardware design in order to get

While developing large-sized chips, “divide & conquer” techniques are used. This involves partitioning the design,

Typically, we see a 4X increase in memory size every 3 years to cater to

Over the years, we have seen a wide range of advancements in semiconductor design services.

The intent of this paper is to explain the varied kinds of DRCs (Design Rule