Power Dissipation in VLSI: Moving to Low Power SoC Design While Improving Performance

In this day and age, we need sleeker devices with more capabilities and longer battery life. This can be accomplished by packing more components on smaller chips, thus moving to low geometry chip design. However, power dissipation or leakage current occurs in all the circuits that are currently used, which increases the overall power consumption, making it less suitable for mobile applications. This blog talks about the types of power dissipation and also mentions the ways to prevent this voltage loss.

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ABOUT THE AUTHOR

Riya Savjani

Riya Savjani is an Inbound and Corporate Marketing Executive at eInfochips. Being a Computer Engineer, she enjoys exploring and experimenting with futuristic technologies. She is a writer who is fascinated by the business world, so she tries her best to summarize how enterprises can leverage trending technologies. When not writing, you will find her binge-watching her favorite shows.