Universal Flash Storage Host Controller IP

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Universal Flash Storage Host Controller IP

Executive Summary

The client is a multi-billion dollar conglomerate from Japan, offering high-tech products. With large exposure to consumer electronics, the client was looking for first-mover advantage with new versions of the UFS protocol. They needed the UFS 1.0 and UFS 2.0 Verification IP (VIP) to be available before the market has access to them through EDA companies.

VIP Development and Sustenance not being a core area for the client, they were looking for an experienced partner to enable market leadership for UFS implementation. eInfochips team, having developed 35+ commercial grade VIPs stepped in to enable standards-compliant UFS interfaces for the latest ASICs from the client. Later, we also developed verification and validation test suites based on JEDEC specifications, and developed RTL for the system.

The client was a first mover in the consumer devices industry to have a fully functional UFS interface. As the standard matured, they monetized the VIP with a leading EDA company.

Project Highlights

  • JEDEC Compliant IP Design
  • MIPI Unipro/M-PHY Support
  • 250 Mbps Data Throughput
  • SCSI Command Set Support
  • Xilinx Zinq Programmable SoC

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    Executive Summary

    The client is a multi-billion dollar conglomerate from Japan, offering high-tech products. With large exposure to consumer electronics, the client was looking for first-mover advantage with new versions of the UFS protocol. They needed the UFS 1.0 and UFS 2.0 Verification IP (VIP) to be available before the market has access to them through EDA companies.

    VIP Development and Sustenance not being a core area for the client, they were looking for an experienced partner to enable market leadership for UFS implementation. eInfochips team, having developed 35+ commercial grade VIPs stepped in to enable standards-compliant UFS interfaces for the latest ASICs from the client. Later, we also developed verification and validation test suites based on JEDEC specifications, and developed RTL for the system.

    The client was a first mover in the consumer devices industry to have a fully functional UFS interface. As the standard matured, they monetized the VIP with a leading EDA company.

    Project Highlights

    • JEDEC Compliant IP Design
    • MIPI Unipro/M-PHY Support
    • 250 Mbps Data Throughput
    • SCSI Command Set Support
    • Xilinx Zinq Programmable SoC

    To read more, download the copy

    arrows-new-1

    To download this resource

    Fill in the details below






      I have read and understand the Privacy Policy By submitting this form, I acknowledge that I have read and understand the Privacy Policy

      I wish to be contacted by eInfochips I wish to be contacted by eInfochips

      For all career related inquiries, kindly visit our careers page or write to career@einfochips.com

      Executive Summary

      The client is a multi-billion dollar conglomerate from Japan, offering high-tech products. With large exposure to consumer electronics, the client was looking for first-mover advantage with new versions of the UFS protocol. They needed the UFS 1.0 and UFS 2.0 Verification IP (VIP) to be available before the market has access to them through EDA companies.

      VIP Development and Sustenance not being a core area for the client, they were looking for an experienced partner to enable market leadership for UFS implementation. eInfochips team, having developed 35+ commercial grade VIPs stepped in to enable standards-compliant UFS interfaces for the latest ASICs from the client. Later, we also developed verification and validation test suites based on JEDEC specifications, and developed RTL for the system.

      The client was a first mover in the consumer devices industry to have a fully functional UFS interface. As the standard matured, they monetized the VIP with a leading EDA company.

      Project Highlights

      • JEDEC Compliant IP Design
      • MIPI Unipro/M-PHY Support
      • 250 Mbps Data Throughput
      • SCSI Command Set Support
      • Xilinx Zinq Programmable SoC

      To read more, download the copy

      arrows-new-1

      To download this resource

      Fill in the details below






        I have read and understand the Privacy Policy By submitting this form, I acknowledge that I have read and understand the Privacy Policy

        I wish to be contacted by eInfochips I wish to be contacted by eInfochips

        For all career related inquiries, kindly visit our careers page or write to career@einfochips.com