SAN Extension ASIC Verification

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SAN Extension ASIC Verification

Executive Summary

Our client, a market leader in storage equipment industry, designs and delivers SAN interconnectivity gateway to connect multiple SANs spread over remote locations. The client had designed a new ASIC for SAN interconnectivity gateways, this ASIC was more efficient and cost effective. The client looked for a technology partner who can do full chip verification of this ASIC.

We designed verification environment and developed test cases to verify the functionality against design specifications. Performance measurement for latency, throughput and bandwidth utilization was carried for SONET OC-12/OC-48. Board level tests were done during chip bring-up to ensure the quality of ASIC.

The client was able to successfully implement new ASIC in SAN interconnectivity gateways which increased its profitability by 10%.

Project Highlights

  • SAN Island Connectivity
  • FC/GbE/SONET/SRAM Support
  • OC-12/OC-48 based Design
  • Multiple Clock Domains
  • 6 Million Gate count

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    Executive Summary

    Our client, a market leader in storage equipment industry, designs and delivers SAN interconnectivity gateway to connect multiple SANs spread over remote locations. The client had designed a new ASIC for SAN interconnectivity gateways, this ASIC was more efficient and cost effective. The client looked for a technology partner who can do full chip verification of this ASIC.

    We designed verification environment and developed test cases to verify the functionality against design specifications. Performance measurement for latency, throughput and bandwidth utilization was carried for SONET OC-12/OC-48. Board level tests were done during chip bring-up to ensure the quality of ASIC.

    The client was able to successfully implement new ASIC in SAN interconnectivity gateways which increased its profitability by 10%.

    Project Highlights

    • SAN Island Connectivity
    • FC/GbE/SONET/SRAM Support
    • OC-12/OC-48 based Design
    • Multiple Clock Domains
    • 6 Million Gate count

    To read more, download the copy

    arrows-new-1

    To download this resource

    Fill in the details below





      I have read and understand the Privacy Policy By submitting this form, I acknowledge that I have read and understand the Privacy Policy

      I wish to be contacted by eInfochips I wish to be contacted by eInfochips

      For all career related inquiries, kindly visit our careers page or write to career@einfochips.com

      Executive Summary

      Our client, a market leader in storage equipment industry, designs and delivers SAN interconnectivity gateway to connect multiple SANs spread over remote locations. The client had designed a new ASIC for SAN interconnectivity gateways, this ASIC was more efficient and cost effective. The client looked for a technology partner who can do full chip verification of this ASIC.

      We designed verification environment and developed test cases to verify the functionality against design specifications. Performance measurement for latency, throughput and bandwidth utilization was carried for SONET OC-12/OC-48. Board level tests were done during chip bring-up to ensure the quality of ASIC.

      The client was able to successfully implement new ASIC in SAN interconnectivity gateways which increased its profitability by 10%.

      Project Highlights

      • SAN Island Connectivity
      • FC/GbE/SONET/SRAM Support
      • OC-12/OC-48 based Design
      • Multiple Clock Domains
      • 6 Million Gate count

      To read more, download the copy

      arrows-new-1

      To download this resource

      Fill in the details below





        I have read and understand the Privacy Policy By submitting this form, I acknowledge that I have read and understand the Privacy Policy

        I wish to be contacted by eInfochips I wish to be contacted by eInfochips

        For all career related inquiries, kindly visit our careers page or write to career@einfochips.com

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