Executive summary
A next‑generation AI‑driven data center SoC required early ‑system level validation to support heavy compute workloads and complex subsystem integration. The design combines multi‑core processing, high‑bandwidth memory, PCIe connectivity, and multiple peripheral interfaces.
To reduce development risk and accelerate readiness ahead of first silicon, full‑chip SoC emulation was adopted using the ZeBu™ Emulator platform. This enabled early firmware ‑bring up, improved debug visibility, and faster system‑ level validation, helping the client identify and address issues earlier in the development cycle.
Key Highlights
- Multi‑core AI SoC with HBM and PCIe subsystems
- NoC‑based connectivity for scalable system integration
- Support for both high‑bandwidth and low‑bandwidth peripherals
- Early software and firmware validation prior to silicon
- Improved debug visibility and faster issue isolation
