System Test using JTAG

Executive Summary

Boundary Scan technique is most often thought of as a board-level test method, but certain techniques makes system level test with JTAG quite effective. Many types of faults can arise when systems are assembled. JTAG testing techniques are well suited to finding and diagnosing many of these problems. For example, a connector may not be making good electrical connect or connector’s pins might be damaged during assembly, some parts of device might be missing or not functioning properly. This paper will show the certain techniques like “Ring Architecture”, “Star Architecture” and “Multi- drop Architecture” for System level testing using JTAG.

Through the JTAG IEEE 1149.1 standard is widely used for board level test, this paper would show the applications of the same standard at the system level test. The system level test using JTAG techniques can be very helpful to support and maintenance personal long after a system has been assembled in a manufacturing environment and installed at a customer location.
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