This paper presents a way to close functional coverage to 100 per cent by following five simple steps. Functional coverage is the major part of functional verification closure, as it directs the functional verification, and demonstrates or measures the completeness of functional verification and while reducing the unnecessary efforts/iterations to close the functional verification to 100 percent of SOC/ASIC/FPGA/Module or IPs. Functional coverage is also one of important sign off criteria for any successful tape-out and gives us positive confidence on maturity of design before its tape-out.

1. Proper understanding of design (DUV/DUT) functionality / specification –
Before developing functional coverage, functional coverage developer has to first understand the design’s (DUV/DUT’s) functionality for the functional coverage. The developer has to develop functional coverage, otherwise due to lack of design specifications, a limited understanding will cause abnormal functional coverage resulting in unnecessary holes. This is the basic and most important requirement of functional coverage development or in verification terminology for functional verification “Misunderstanding of Specification is the Leading Cause of Bug” here same things for functional coverage Misunderstanding of Specification is the Leading Cause of hole.”

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