Resources

Design for Testability (DFT) of a Motion Control MEMS ASIC

End-to-End Design for Testability (DFT) of a Digital Motion Control MEMS ASIC – DFT architecture defining to post-silicon support…

Design for Testability for a High-speed Gigabit Ethernet Controller for Networking

ASIC design and DFT solution for a Gigabit Ethernet Controller at 28nm technology node to enable high-performance …

These products address the technology needs of smartphone & wearable device makers, smart home providers & industrial…

The OptiX is a full-chip design environment that includes innovative automation and reporting capabilities…

The client is a multi-billion dollar conglomerate from Japan, offering high-tech products. With large exposure…

In the previous blog (Synchronization techniques for multi-clock domain SoCs & FPGAs), we studied different types of…