Synopsys

As an EDA partner, eInfochips has also helped in development, verification and sustenance of design and verification IPs. eInfochips have also successfully integrated design IPs and verification IPs in ASICs for leading semiconductor companies leveraging following tools:

Design

  • DC Ultra, Design Vision
  • HDL Compiler

Verification

  • Formality
  • VCS

Physical Design

  • ICC2, StarRC, IC Validator & Compiler
  • PrimeRail, PrimeTime SI
  • Formality, RedHawk

Design for Testability

  • DFTMAX, DFT Compiler
  • TetraMAX, DVE, STAR

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