With the complexities in Analog Mixed Signal SoC’s/chips, there is a need to automate the methodology or flow to provide confidence on Command Line based Mixed Signal Verification. This blog focuses on addressing the challenges faced in Mixed Signal verification.
Read the article [responsivevoice_button buttontext='Hear the article' voice='US English Female']
Due to immense complexities in Analog Mixed Signal SoC’s/chips, there is an intrinsic need for automation in the methodology or flow to provide confidence on Command Line based Mixed Signal Verification as shown in Figure 1. The UVM-MS methodology is a command line based (or file based) approach and in that methodology, the AMS test bench set up files (e.g. amscf.scs, amsbind.scs etc.) can be auto generated with the help of config view (a configuration view which is created using Hierarchy editor in GUI mode) using runams script that these files could readily be used while running simulation with irun.
This article describes how AMS test bench setup files can be auto-generated using runams script and be used in the command line based AMS verification.
This blog covers challenges faced in mixed signal verification and debugging in a AMS verification cycle #MixedSignal #Semiconductor #AMSVerification via @einfochipsltd
Mixed signal verification challenges
The analog verification methodology is traditionally ad-hoc by nature, lacking the formalized methodology that is available on the digital side. Digital verification team now have access to the verification plans, constrained-random stimulus generation, test bench automation, assertions, and coverage metrics. In digital design, the metric-driven verification approach, standardized for reusability as Universal Verification Methodology (UVM) helps engineers build confidence in the verification by increasing coverage to the desired level. On the analog side, verification is driven by directed tests run over sweeps, corners, and Monte Carlo analysis. Several analog solvers today provide low-level device checks, but there is little or no support for verification planning or coverage metrics.
The .amsbind.scs file binds the amsd control block for config view. An amsbind.scs file which is auto-generated looks like below:
A typical spiceModels.scs file which is auto-generated looks like below:
A typical amsControlSpectre.scs file which is auto-generated looks like below:
Why should we consider this flow?
The approach to verify a Mixed-signal SoC is time consuming and also very complex. Because, it requires to generate spectre netlist of the Schematic view and manual configuration using portmap. Hence, majority of time in verification is spent on AMS setup/bring up. There is a demand to save the time and for that certain steps have to be automated.
This flow is simple and easily automated to setup the AMS engineering flow in UVM based (command line based) AMS verification and if the design is complex then it saves a lot of time in AMS semiconductor environment bring up.