Design for Testability of Optical PHY Ethernet Switch ASIC

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Design for Testability of Optical PHY Ethernet Switch ASIC

Executive Summary

The client is based in the US, is a global supplier of semiconductor and infrastructure software products. To enable niche and high-performance production, the client was considering a custom silicon solution to ensure product differentiation and to gain a competitive edge.

The team at eInfochips developed a custom silicon, also known as application-specific integrated circuits (ASICs) for the client, that allows to create deeply differentiated silicon solutions. Optical Ethernet PHY portfolio offers the highest integration of features at the lowest power, enabling customers to deliver cost-effective networking equipment for data centers, service providers, and enterprise networking markets. The client offers comprehensive portfolio of Optical Ethernet PHYs for transmission of 1 GB/s to 400 GB/s data. The client’s next-gen ASIC was one of the biggest chip targeted at 7nm technology and so far to enable coherent transmission from 800G to greater than 1TB. They were looking for DFT experts who can help in implementation within the stringent die size requirement.

Project Highlights

  • Targeted for High-Speed Data Centers
  • Large and Complex chip
  • 800G Transmission Rate at 1GHz
  • DFT Insertion and Validation at 7nm

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    Executive Summary

    The client is based in the US, is a global supplier of semiconductor and infrastructure software products. To enable niche and high-performance production, the client was considering a custom silicon solution to ensure product differentiation and to gain a competitive edge.

    The team at eInfochips developed a custom silicon, also known as application-specific integrated circuits (ASICs) for the client, that allows to create deeply differentiated silicon solutions. Optical Ethernet PHY portfolio offers the highest integration of features at the lowest power, enabling customers to deliver cost-effective networking equipment for data centers, service providers, and enterprise networking markets. The client offers comprehensive portfolio of Optical Ethernet PHYs for transmission of 1 GB/s to 400 GB/s data. The client’s next-gen ASIC was one of the biggest chip targeted at 7nm technology and so far to enable coherent transmission from 800G to greater than 1TB. They were looking for DFT experts who can help in implementation within the stringent die size requirement.

    Project Highlights

    • Targeted for High-Speed Data Centers
    • Large and Complex chip
    • 800G Transmission Rate at 1GHz
    • DFT Insertion and Validation at 7nm

    To read more, download the copy

    arrows-new-1

    To download this resource

    Fill in the details below





      I have read and understand the Privacy Policy By submitting this form, I acknowledge that I have read and understand the Privacy Policy

      I wish to be contacted by eInfochips I wish to be contacted by eInfochips

      For all career related inquiries, kindly visit our careers page or write to career@einfochips.com

      Executive Summary

      The client is based in the US, is a global supplier of semiconductor and infrastructure software products. To enable niche and high-performance production, the client was considering a custom silicon solution to ensure product differentiation and to gain a competitive edge.

      The team at eInfochips developed a custom silicon, also known as application-specific integrated circuits (ASICs) for the client, that allows to create deeply differentiated silicon solutions. Optical Ethernet PHY portfolio offers the highest integration of features at the lowest power, enabling customers to deliver cost-effective networking equipment for data centers, service providers, and enterprise networking markets. The client offers comprehensive portfolio of Optical Ethernet PHYs for transmission of 1 GB/s to 400 GB/s data. The client’s next-gen ASIC was one of the biggest chip targeted at 7nm technology and so far to enable coherent transmission from 800G to greater than 1TB. They were looking for DFT experts who can help in implementation within the stringent die size requirement.

      Project Highlights

      • Targeted for High-Speed Data Centers
      • Large and Complex chip
      • 800G Transmission Rate at 1GHz
      • DFT Insertion and Validation at 7nm

      To read more, download the copy

      arrows-new-1

      To download this resource

      Fill in the details below





        I have read and understand the Privacy Policy By submitting this form, I acknowledge that I have read and understand the Privacy Policy

        I wish to be contacted by eInfochips I wish to be contacted by eInfochips

        For all career related inquiries, kindly visit our careers page or write to career@einfochips.com