In the News

2021
Dec, 23 Design-Reuse.com Crux of Custom Power & Special Net Routing
Nov, 29 Community.Nasscom.in IoT Fleet Management & Telematics- Use cases and Benefits
Nov, 16 EconomicTimes.IndiaTimes.com Flexing India’s prowess in design and product engineering on the global stage
Nov, 02 Community.Nasscom.in How Digital Technologies are Empowering Medical Imaging
Oct, 25 Design-Reuse.com Software Architecture for DO-160 Qualification of STM32H7 based systems
Sep, 14 SemiWiki.com Understanding BLE Beacons and their Applications
Sep, 13 AnalyticsInsight.net IoT Security Solutions: Security Issues with Connected Devices
Ju1, 14 EEWeb.com Speaker Recognition and Verification Systems – All You Need to Know
Jun, 02 AnySilicon.com The CXL Arbitrator & Multiplexer in a Nutshell
May, 24 Design-Reuse.com Creating IP level test cases which can be reused at SoC level
Apr, 13 SemiWiki.com Certitude: Tool that can help to catch DV Environment Gaps
Mar, 30 EEWeb.com Understanding Cybersecurity Framework, Objectives and Types
Mar, 07 SemiWiki.com Digital Filters for Audio Equalizer Design
Feb, 08 BusinessWire.com Pandemic Accelerates Smart Manufacturing Trend as U.S. Companies Face Disruptions, Continue Push Into Services
Jan, 19 Design-Reuse.com Verifying Dynamic Clock switching in Power-Critical SoCs
Jan, 08 Design-Reuse.com Congestion & Timing Optimization Techniques at 7nm Design
Jan, 05 EDNAsia.com How 5G, IoT & AI redefine the in-store retail transformation
Jan, 05 Design-Reuse.com Smart Wave Dump – A smart way to generate waveforms
Jan, 02 Embedded.com How 5G, IoT & AI will redefine the retail customer in-store experience
2020
Dec, 07 SemiWiki.com Sign Off Design Challenges at Cutting Edge Technologies
Dec, 07 Design-Reuse.com Gathering Regression List for Structural Coverage Analysis
Nov, 24 Embedded-Computing.com Importance of Hierarchical DFT implementation in maximizing the SoC – throughput – Part – I
Nov, 10 Design-Reuse.com Optimizing Floorplan for STA and Timing improvement in VLSI Design Flow
Oct, 28 Embedded-Computing.com Effect of Temperature Inversion on Lower Nodes
Oct, 27 Design-Reuse.com Next Gen Scan Compression Technique to overcome Test challenges at Lower Technology Nodes (Part – I)
Oct, 23 Design-Reuse.com Scan Chains: PnR Outlook
Oct, 22 Embedded-Computing.com Reduce DFT Footprints in ASIC Design by Addressing Test Time
Oct, 16 ElectronicDesign.com 7-nm ASIC Technology Sets Sights on Future Data Centers
Sept, 22 Embedded-Computing.com Setup Violation Fixing in Timing Critical Complex Designs Using Late Clocking
Sept, 21 Design-Reuse.com Reducing Debug time for Scan pattern using Parallel Strobe Data (PSD) Flow
Sept, 15 Embedded-Computing.com Formal Verification Flow, Benefits, and Debug on 16 nm Technology
Aug, 27 SemiWiki.com Techniques to Reduce Timing Violations using Clock Tree Optimizations in Synopsys IC Compiler II
Aug, 26 Design-Reuse.com Optimization of Crosstalk Delta Delay on Clock Nets
Aug, 21 Embedded-Computing.com Effective Reporting of UVM Transaction – Custom Transaction Printer
Jul, 28 Design-Reuse.com DDR IP Hardening – Overview & Advance Tips
Jul, 07 Design-Reuse.com Antenna Effect in 16nm Technology Node
Jun, 24 Embedded-Computing.com A Step by Step Guide to Voice Enabled Device Testing
Jun, 15 Embedded-Computing.com Digitizing Data Using Optical Character Recognition (OCR)
June, 10 Embedded-Computing.com High Speed PCB Design Precautions to Reduce EMI
May, 12 Design-Reuse.com Reduce ATPG Simulation Failure Debug Time by Understanding and Editing SPF
Apr, 28 Design-Reuse.com Methodology to reduce Run Time of Timing/Functional Eco
Apr, 15 Design-Reuse.com Embedded Software Unit Testing with Ceedling
Apr, 03 Design-Reuse.com eInfochips to Exhibit and Present at Design & Reuse IP-SoC Silicon Valley 2020
Apr, 01 Embedded-Computing.com Performing End-to-End Traffic Traceability Using Functional Coverage
Mar, 17 Design-Reuse.com Shift Power Reduction Methods and Effectiveness for Testability in ASIC
Mar, 16 Design-Reuse.com DAeRT: eInfochips’ DFT Framework that Increases Productivity and Reduces Silicon Development Cycle
Mar, 11 Design-Reuse.com Internal JTAG – A cutting-edge solution for embedded instrument testing in SoC: Part 2
Mar, 06 Design-Reuse.com Strategy To Fix Register-to-Register Timing For large Feedthrough Blocks Having Limited Internal Pipelines
Feb, 21 ElectronicDesign.com A Guide on LVS in the Nanometer Era
Feb, 13 Design-Reuse.com Layout versus Schematic (LVS) Debug
Feb, 13 Embedded-Computing.com Incorrect Pronunciation Detection in eLearning using Deep Learning
Feb, 04 Embedded-Computing.com Everything You Need to Know about Obtaining Audio Certification
Jan, 27 Design-Reuse.com Interface Timing Challenges and Solutions at Block Level
Jan, 13 Design-Reuse.com Setup Margin Aware Quick Hold Fixing
Jan, 06 EDN.com Generic report catcher: A smart way of controlling messages
Jan, 06 Design-Reuse.com Understanding Shmoo Plots and Various Terminology of Testers
2019
Azure Microsoft.com – 2019 https://azure.microsoft.com/en-us/blog/microsoft-and-qualcomm-accelerate-ai-with-vision-ai-developer-kit/
A Market Research Report.com – 2019 Digital Transformation In Connected Mobility Market Astonishing Growth Opportunities to be Witnessed by 2026 | Exel Logistics (U.K.), Menlo Worldwide Logistics (U.S.), FedEx (U.S.), Ryder Logistics (U.S.), Tibbett and Britten (U.K.)
BusinessWire.com – 2019 Arrow Electronics to Participate in Qualcomm’s Smart Cities Accelerator Program to Collaborate on Services to OEMs and System Integrators
CES.EETimes.com – 2019 AI comes of age at CES 2019
Design & Reuse.com – 2019 Internal JTAG – A cutting-edge solution for embedded instrument testing in SoC: Part 1
UVM RAL Model: Usage and Application
Testing Of Repairable Embedded Memories in SoC: Approach and Challenges
Cost Reduction and Improved TTR with Shared Scan-in DFT CODEC
A Guide on Logical Equivalence Checking – Flow, Challenges, and Benefits
Reducing DFT Footprints: A Case in Consumer SoC
Signoff Iteration Reduction Technique for Fixing Top Level Antenna
Memory Testing – An Insight into Algorithms and Self Repair Mechanism
A Heuristic Approach to Fix Design Rule Check (DRC) Violations in ASIC Designs @7nm FinFET Technology
System Verilog Macro: A Powerful Feature for Design Verification Projects
Distorted Waveform Phenomena in 7nm Technology Node and its Impact on Signoff Timing Analysis
Area Overhead: GOH Control and Track
Designing an Effective Traffic Management System Through Vehicle Classification and Counting Techniques
DNAIndia.com – 2019 Selling useful product is key to start-ups’ success: Experts
Gujarat: Intellectual property is the new wealth creator, businessmen say
EECatalog.com (Chip Design) – 2019 Low power implementation techniques for ASIC physical design
Crosstalk Analysis and Its Impact on Timing in 7nm Technology
Enhancing the Situational Awareness of Pilots with Voice Assistance
EDN Network – 2019 Low power implementation techniques for ASIC physical design
Parametric On-Chip Variation (POCV): A step towards accurate timing analysis
eGov.eLetsOnline.com – 2019 Growth Drivers of focus sectors Gujarat’s Economy
EconomicTimes.IndiaTimes.com – 2019 IESA aims to create Rs 1,000 cr biz, 1 mn jobs from startups in 5 yrs
EETimes.eu – 2019 Sensor to Sunset: Making IoT Easy from Concept to Decommissioning
EETimes.com – 2019 Tips for Designing a Virtual Assistant
EEWeb.com – 2019 A Cryptographic Proof-of-Concept for Securing Aircraft ADS-B Data
Enhancing the Situational Awareness of Pilots with Voice Assistance
ELETimes.com – 2019 Understanding Electromigration and IR Drop in Semiconductor Chip Design: Challenges and Techniques
IDC.com – 2019 Product Engineering and Operational Technology Services
L’Embarque.com – 2019 Arrow exploite l’i.MX 8QuadXPlus et l’i.MX 8M de NXP sur deux cartes de développement 96Boards
NewElectronics.co.uk – 2019 Arrow Electronics joins Siemens’ MindSphere Partner Program
QurateResearch.com – 2019 Global Cognitive Analytics Industry Market Research Report
SandHill.com – 2019 The Essential Guide to Quality Assurance in Digital Transformation Planning
Product Test Automation in the Era of Digital Transformation
Why IoT Development Needs Microservices and Containerization
TheMotleyfool.com – 2019 Arrow Electronics Inc (ARW) Q1 2019 Earnings Call Transcript
TheNewsMates.com – 2019 Video Management Software (VMS) Market 2019 With Top Countries Data : Size, Production, Prospects, Consumption, Cost Structure And Forecast To 2023
Internet of Things (IoT) Integration Market 2018: Analysis by Top Key Players,Current Industry Status,Growth Opportunities, Target Audience and Forecast to 2023
YourStory.com – 2019 Chatbot’s Use Cases for Healthcare, CRM, e-Retail Industry
2018
Design & Reuse.com – 2018 Usage of Multibit Flip-Flop and its Challenges in ASIC Physical Design
Aircraft Jet Engine Failure Analytics Using Google Cloud Platform Based Deep Learning
Implementing Parallel Processing and Fine Control in Design Verification
System Verilog Assertions Simplified
EDN Network – 2018 A step-by-step guide to reusable, generic scoreboarding
UVM Reactive agents verify with a handshake
EECatalog.com (Chip Design) – 2018 Improvement in QoR at Various Stages in Place and Route for 7nm Technology
EEWeb.com – 2018 Fault Detection Using a Bank of Kalman Filters and a Fast Fourier Transform
Real-Time Face Detection and Recognition with SVM and HOG Features
A Cryptographic Proof-of-Concept for Securing Aircraft ADS-B Data
HfS Research.com – 2018 HFS Blueprint Report: Aerospace Engineering Services
Market Research Hub.com – 2018 Global Engineering Analytics Services Market Size, Status and Forecast 2025
Progressive Markets – 2018 Intelligent Vending Machines Market
PRNewswire.com – 2018 Global IoT engineering services market is projected to grow at a CAGR of 23% by 2023
SecurityLinkIndia.com – 2018 How to Mitigate Latency in Cloud-based Video Management Systems
Integration of VMS with Third-party Systems to Improve Business Operations & ROI
Solid State Technology – 2018 Overcoming challenges of futuristic transistor technology below 5nm node
SandHill.com – 2018 So You’re Thinking of Spending Money on a Chatbot
Tech Online – 2018 Understanding Electromigration and IR Drop in SoC Design
Telematics Wire – 2018 Smart Automotive – Automotive in Transition
The Finance Goof 2018 – 2018 Vetronics | Market 2018 Analysis | (Axxonsoft, Milestone Systems, On-Net Surveillance Systems) and more…
WhaTech.com – 2018 Discover the global artificial intelligence in behavioral and mental health care market
Yahoo Finance – 2018 Medical Device Firms in Focus on Expanded R&D Scope: 5 Picks
2017
Business Standard – 2017 Digital platform engineering: New winners
Business Wire – 2017 Internet of Things (IoT) Integration Market to Reach $29 Billion by 2022 – Analysis by Service, Organization Size, Application Area & Region – Research and Markets
CIO Review – 2017 eInfochips: Enabling Digital Transformation from Silicon to Software
CreativeBharat.com – 2017 Unique & Innovative Snapbricks IoT Solution for IT-OT Convergence Challenges
Design & Reuse.com – 2017 Wind Turbine Fault Detection Using Machine Learning And Neural Networks
Ins and Outs of Assertion in Mixed Signal Verification
Platform Software Verification Framework Solution for Safety Critical Systems
Smart Tracking of SoC Verification Progress Using Synopsys’ Hierarchical Verification Plan (HVP)
Processor-In-Loop Simulation: Embedded Software Verification & Validation In Model Based Development
UVM Sequence Library – Usage, Advantages, and Limitations
Power Optimization using Multi BIT flops and MIMCAPs in 16nm technology and below
Correlation of Routability and Placement Density for better QoR in 16nm technology
Verification Planner in QuestaSim
Design Rule Checks (DRC) – A Practical View for 28nm Technology
A Review Paper on CMOS, SOI and FinFET Technology
Understanding the Technology behind Traffic Sign Recognition (TSR) Systems
DevOps.com – 2017 Move the Needle in DevOps with Continuous Testing
Improving DevOps Success with Well-Defined Metrics
eInfochips Announces HawkDTM DevOps Services for Continuous Delivery in IoT and IIoT Solution Development
EDN Network – 2017 SoC Functional verification flow
Resistance scaling fixes miscorrelation between PNR and signoff STA
API-based Verification Approach: Effective reuse of Verification environment components
Eletimes.com – 2017 https://www.eletimes.com/end-end-asic-design-solution-shorter-ttm
Electronics Media.com – 2017 List of Semiconductor Companies in India
Embedded.com – 2017 Applying deep learning for a driver assessment module
Applying DevOps to IoT solution development
Engerati.com – 2017 Applying DevOps Strategy to Build IoT Platforms for Smart Homes
Healthcareguys.com – 2017 Digital Transformation Challenges in Healthcare Information Technology and Medical Devices
HfS Research.com – 2017 HFS Blueprint: Embedded and Semiconductor Engineering Services
IoT Institute – 2017 From edge to cloud: A comprehensive look at IoT device security
IoT gateway architecture: Clustering ensures reliability
IoTBusinessnews.com – 2017 How IoT Device Lifecycle Management Is Becoming a Growth Factor for Industries
IoT Central – 2017 What are the security vulnerable points in an IoT Solution, and How to enable security from edge to cloud?
Why Smart Grids need an IoT Gateway Solution?
IoTGlobalNetwork.com – 2017 Ongoing trends in IoT device lifecycle management
IoTJournal.com – 2017 Challenges and Opportunities for the Semiconductor Industry in the IoT
IoT-Now.com – 2017 IoT gateways – Drivers for fog computing
MarketsandMarkets.com – 2017 IoT Engineering Services Market worth 29.53 Billion USD by 2022
Video Management Software (VMS) Market by Type of Solution (Video Intelligence, Case Management, Advanced Video Management, and Mobile Application), Technology, Service, Deployment, Vertical, and Region – Global Forecast to 2021
IoT Device Management Market by Solution (Real-Time Streaming Analysis, Security Solutions, Data Management, Remote Monitoring, Network Bandwidth Management), Service, Application Area, Deployment Model, and Organization Size – Global Forecast to 2022
Internet of Things (IoT) Integration Market by Service (Device and Platform Management, System Design and Architecture, Advisory Services), Organization Size, Application Area (Smart Healthcare, Smart Retail), and Region – Global Forecast to 2022
PRNewswire.com – 2017 IoT Device Management Market Worth 2,559.6 Million USD by 2022
QYResearch.US – 2017 Global Internet of Things (IoT) Integration Market Size, Status and Forecast 2022
SandHill.com – 2017 Why IoT Development Needs Microservices and Containerization
How Virtualization is Optimizing IoT Test Automation
Practical approach towards optimize code Implementation
The Advantage of Model-Based Design
SecurityLinkIndia.com – 2017 Designing Intelligent Retail Store: In-Store Video Analytics & Video Management Software
SecuritySystemsNews.com – 2017 Global VMS market to reach $10 billion in the next several years
Security.World – 2017 Developing Highly Scalable, Secure, Cost Effective Cloud-Based VMS Using Micro-Services
SiliconIndiaMagazine.com – 2017 eInfochips: Reliable Technology Partner Delivering Complex, Cutting – Edge Projects
TheSiliconReview.com – 2017 Championing innovation-driven business: eInfochips
TechSciResearch.com – 2017 Global IOT Device Management Market By Solution (Real-Time Streaming Analytics, Security Solution, Data Management, etc.), By Deployment (Public Cloud, Private Cloud & Hybrid Cloud), By Application Area (Smart Retail, Connection Health, Connected Logistics, etc.), Competition Forecast & Opportunities, 2012 – 2022
VisionGain.com – 2017 Connected Home Market Forecast 2017-2027
2014
Financial Express – 2014 Deciphering the design code
Aerospace Manufacturing and Design – 2014 Millions of data points flying in tight formation by Dhaval Shah
Millions of data points flying in tight formation – Part 2
Xilinx November
Newsletter – 2014
Processor Based Timing Signal Generator for Radar and Sensor Applications
EDN Network – 2014 Clock monitors in SoC Verification
Multiple clock domain SoCs: Verification Techniques by Tejas Dave, Amit Jain and Divyanshu Jain
Multiple clock domain SoCs: Addressing structural defects by Tejas Dave, Amit Jain and Divyanshu Jain
Guidelines improve test quality in advanced CMOS nodes
Efficiently estimate & optimize leakage in SoCs by Rajendra Pratap & Kavita Pandita
Synchronizer techniques for multi-clock domain SoCs & FPGAs by Tejas Dave, Amit Jain & Divyanshu Jain
IDDQ testing to improve yield and reliability, 1/2 by Maulin Sheth & Nirav Nanavati
IDDQ testing to improve yield and reliability, 2/2 by Maulin Sheth & Nirav Nanavati
Spare cell leakage minimization in physical design, part 2 of 2 by Rakesh Thakkar
Spare Cell Leakage Minimization in Physical Design – Part 1 by Rakesh Thakkar
Boundary Scan: Seven Benefits by Chintan Panchal and Parth Rao
Leakage power optimization for 28nm and beyond – BY Aishwary Dadeech & Dhaval Parikh
A Day in the Life of a Chip Designer – By Nilesh Ranpura
Impact of wire resistance in advance technology – By Hardik Desai
8 Success Factors with Multicore Platforms by Aman Gupta
Medical Design Briefs – 2014 Battle of the Processors: A Guide to Next-Generation Medical Imaging Products
National Retail Federation – 2014 One Infrastructure, Many Uses
Intel Embedded
Community – 2014
Roving Reporter: Protecting Perishables with IoT Sensors
Electronics Maker – 2014 Common Constraints Considerations in SystemVerilog by Heena Mankad
Selenium WebDriver – Perform Operations on WebElements by Vamseedhar Reddy
Boost.Asio – The Powerful C++ Asynchronous I/O library by Hetal Shah
Perceptual Computing – Hand Gestures from Amit Gajjar
Load Test for eCommerce Portals and Website
Electronics Maker
Magazine – 2014
Getting Started with Selenium WebDriver – By Vamseedhar Reddy
Embedded.com – 2014 The Need for Speed in Low Latency Video System Designs by Krishna Prabhakaran
Med Device Online – 2014 8 Factors To Consider Before Adding M2M Capabilities To Your Medical Device by Manish Chavda & Shashank Mitta
8 Factors To Consider Before Taking The Open-Source Software Leap by Renjith Ponappan
Medical Design Technology (MDT)
Magazine – 2014
Medical Device MVP: System Design – By Renjith Ponnappan
Biggest Challenges in Medical Device Design: Highway to the Danger Zone – By Renjith Ponnappan
Medical Device Designers Hunting for Success – By Renjith Ponnappan
2013
Electronics maker Magazine – Year 2013 Double patterning Technology: Challenging finer technology nodes – By Ujjwal Prakash
Design & Reuse –
Year 2013
Smart Transit Solution – By Montu Rathod
Digital Signal Processing (DSP) Verification—By Anil Panchal
Bridging the Gap: Pre to Post Silicon Functional Validation – By Heena Mankad
Extreme Programming – By Amit Gajjar
Soft memories in PD flow : Myth and Reality – By Aditya Darad, Tanik B and Manish Garg
Generic DDR Behavioural Model – By Hari Patel and Amar Solanki
System Test using JTAG –By Chintan Panchal &Parth Rao
Design News – Year 2013 5 Things Android Developers Can Do to Seize the Day in Wearable Devices- By Renjith Ponnappan
Electronics For You – Year 2013 The biggest design challenge for the Internet of Things is to keep up with the moving- An interview with Pratul Shroff
Physical Design Implementation Challenges in Highly Memory-Intensive Design in 40 nm – By Ratan Devpura, Niraj Jani, Jignesh Panwala and Parth Lakhiya
Design and Reuse –
Year 2013
Low Power Design for Testability– By Miteshwar M. Patel and Nirav Nanavati
CIOL – Year 2013 5 simple steps to close functional coverage to 100 % – By Dilip Prajapati
SoC Verification by communicating between HVL Env, processor – By Sandeep Vaniya
Verification approach towards an evolving IP –By Harshal Chhaya & Jignesh Oza
Electronics Maker – Year 2013 FPGA Prototyping Trends and Challenges- By Sachin Gorkhe
Video Surveillance in Retail – By Vipul Mistry & Dharati Shah
EETimes India –Year 2013 Grasping the low power fundamentals- By Nishant Patel
HART over IP for industrial automation networks – Sapan Shah & Priyanka Bhargava
Exploring the network on chip concept- By Chirag Mania & Jignesh Panwala
VMM Central –
Year 2013
Coverage coding: simple tips and gotchas – By Bhushan Safi
2012 - 2007
EE Times – Year 2010 eInfochips ranked top chip design services provider by Gartner
CIOL – Year 2012 The Powerful, Free Automation Tool – AutoHotKey – By Bhavin Patel
TechOnline India – Year 2011 FPGA Prototyping – HDL migration and FPGA Debug – By Sachin Gorkhe
Electronics Maker – Year 2009 Guest column on RFID by Rajeev Kaushal in the article – RTLS: A technology for effective tracking solutions – By D. K. Ramkumar
ECN ASIA – Year 2009 Boosting data transfer over network with TOE By Niraj Patel.
Xilinx Xcell Journal – Year 2009 How to Tame the Power Beast in Consumer Hand Held MPU By Rahul V. Shah and Vishesh Agrawal
EDN Asia – Year 2009 Why outsource designs?
From Project to Product Engineering
Electronic Design – Year 2009 Break Through The TCP/IP Bottleneck With iWARP
VARIndia – Year 2009 IPTV shows Promise in India but needs QoS Enhancement
Wireless Collaboration with .NET by Ashish Shah
EDN US – Year 2009 Estimating Power in FPGA Design by Rahul V Shah
EFY – Year 2009 Embedded System Can India Move from Implementing to Initiate Products?
Techonlineindia.com – Year 2009 Technology development strategy in difficult times by Mr Rajeev Gupta
EDA Design line – Year 2009 HDL design methods for low-power design by Kaushal Buch
A&S International – The leading International Security Magazine – Year 2009 Comparing Chipset Platforms: Nuts and Bolts of Video Surveillance
EDN Asia – Year 2008 eInfochips Announces DDR2 SDRAM Verification IP and Reed Solomon Encoder Design IP
Fabless yet Fabulous By Nirav Shah, Director of Marketing, eInfochips
EE Times – Year 2008 Tools manage verification data report by Rahul V Shah
Electronics Maker – Year 2008 Software Tools and Developments for Automotive electronics
A&S Asia – Year 2008 Utility Security Upholds
Chip Design Magazine – Year 2008 Quantification-Based Verification Checks Embedded – Systems Video Quality by Bhaskar Trivedi
Xcell Journal – Year 2008 A/V Monitoring System Rides Virtex-5 by Manish Desai (Project Lead – ASIC – FGPA)
ECN Asia – Year 2008 The five commandments of outsourcing written by Mr Nilesh Ranpura
VLSI Society of India’s VSI Journal – Year 2008 Performance enhancement in SPI 4.2 IP Core
Chip Design – Year 2006 System Verilog Community Builds with Verification IP
Assertion-Based Verification Shortens Project Design Time By Shailesh Dave
Chip Design – Year 2005 Navigating the Silicon Jungle: FPGA or ASIC?
Latest Challenges & Trends in Chip Verification
EETimes – Year 2005 Cluster-based approach eases clock tree synthesis By Udhaya Kumar
UWB gaining infrastructure By Ron Wilson
Electronic Design – Year 2005 Simulation Mismatches Can Foul Up Test-Pattern Verification By Udhaya Kumar
EDN Asia – Year 2005 FPGAs implementing high-end image-processing applications By Pradeep Chakraborty
SOC Central : White paper – Year 2005 Elements of Verification By Rohit Dubey
Express Computers – Year 2005 4Gbps to the fore By Venkatesh Ganesh
EE Times – Year 2004 When requirements outrun an architecture By Ron Wilson
Digital ‘verification IP’ is becoming more design-like By Ron Wilson
Getting an algorithm ready for reuse By Ketul Patel
Embedded test tackles verification times By Nicolas Mokhoff
Inside a hybrid verification model By Nilesh Ranpura
IP model shift: from blocks to app-specific subsystems By Ron Wilson
Outsourcing backers say move up food chain, foes question new job claims