Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.5 (ISE) - P.58f Target Family: Spartan3A and Spartan3AN
OS Platform: NT64 Target Device: xc3s400an
Project ID (random number) 613cafb01be94e7db8e61413bb7528d2.8E47CDE824FA08BFEBA5F108DC27ACA9.42 Target Package: fgg400
Registration ID 176037603_1777495448_210568424_945 Target Speed: -4
Date Generated 2014-11-10T13:38:57 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz CPU Speed 2691 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=5
  • 3-bit subtractor=1
  • 32-bit adder=1
  • 8-bit subtractor=2
  • 9-bit adder=1
Comparators=2
  • 3-bit comparator greater=1
  • 32-bit comparator less=1
Counters=5
  • 10-bit up counter=1
  • 13-bit up counter=1
  • 3-bit up counter=1
  • 32-bit up counter=1
  • 5-bit up counter=1
FSMs=2 Multiplexers=2
  • 1-bit 4-to-1 multiplexer=1
  • 24-bit 4-to-1 multiplexer=1
ROMs=1
  • 128x100-bit ROM=1
Registers=824
  • Flip-Flops=824
Xors=86
  • 1-bit xor2=86
MiscellaneousStatistics
  • AGG_BONDED_IO=206
  • AGG_IO=206
  • AGG_SLICE=1221
  • NUM_4_INPUT_LUT=1688
  • NUM_BONDED_DIFFMI_NDT=3
  • NUM_BONDED_DIFFMTB=1
  • NUM_BONDED_DIFFSI_NDT=3
  • NUM_BONDED_DIFFSTB=1
  • NUM_BONDED_IBUF=35
  • NUM_BONDED_IOB=163
  • NUM_BUFGMUX=6
  • NUM_CYMUX=216
  • NUM_IOB_FF=3
  • NUM_LUT_RT=97
  • NUM_ODDR2_NONE=2
  • NUM_SHIFT=2
  • NUM_SLICEL=1163
  • NUM_SLICEM=58
  • NUM_SLICE_FF=843
  • NUM_SPI_ACCESS=1
  • NUM_XOR=98
NetStatistics
  • NumNets_Active=2524
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=514
  • NumNodesOfType_Active_CNTRLPIN=842
  • NumNodesOfType_Active_DOUBLE=5450
  • NumNodesOfType_Active_DUMMY=5698
  • NumNodesOfType_Active_DUMMYBANK=3
  • NumNodesOfType_Active_DUMMYESC=146
  • NumNodesOfType_Active_GLOBAL=212
  • NumNodesOfType_Active_HFULLHEX=60
  • NumNodesOfType_Active_HLONG=10
  • NumNodesOfType_Active_HUNIHEX=482
  • NumNodesOfType_Active_INPUT=7119
  • NumNodesOfType_Active_IOBOUTPUT=145
  • NumNodesOfType_Active_OMUX=2009
  • NumNodesOfType_Active_OUTPUT=2166
  • NumNodesOfType_Active_PREBXBY=2205
  • NumNodesOfType_Active_VFULLHEX=397
  • NumNodesOfType_Active_VLONG=69
  • NumNodesOfType_Active_VUNIHEX=686
  • NumNodesOfType_Vcc_CNTRLPIN=8
  • NumNodesOfType_Vcc_DUMMY=4
  • NumNodesOfType_Vcc_INPUT=8
  • NumNodesOfType_Vcc_PREBXBY=2
  • NumNodesOfType_Vcc_VCCOUT=8
SiteStatistics
  • DIFFMI_NDT-DIFFMTB=3
  • DIFFSI_NDT-DIFFSTB=3
  • IBUF-DIFFMI_NDT=3
  • IBUF-DIFFMLR=4
  • IBUF-DIFFMTB=8
  • IBUF-DIFFSI_NDT=3
  • IBUF-DIFFSLR=4
  • IBUF-DIFFSTB=8
  • IOB-DIFFMLR=43
  • IOB-DIFFMTB=38
  • IOB-DIFFSLR=43
  • IOB-DIFFSTB=39
  • SLICEL-SLICEM=555
SiteSummary
  • BUFGMUX=6
  • BUFGMUX_GCLKMUX=6
  • BUFGMUX_GCLK_BUFFER=6
  • DIFFMI_NDT=3
  • DIFFMI_NDT_DELAY_ADJ_BBOX=3
  • DIFFMI_NDT_INBUF=3
  • DIFFMI_NDT_PAD=3
  • DIFFMTB=1
  • DIFFMTB_OUTBUF=1
  • DIFFMTB_PAD=1
  • DIFFSI_NDT=3
  • DIFFSI_NDT_PAD=3
  • DIFFSI_NDT_PADOUT_USED=3
  • DIFFSTB=1
  • DIFFSTB_DIFFO_IN_USED=1
  • DIFFSTB_OUTBUF=1
  • DIFFSTB_PAD=1
  • IBUF=35
  • IBUF_DELAY_ADJ_BBOX=35
  • IBUF_INBUF=35
  • IBUF_PAD=35
  • IOB=163
  • IOB_DELAY_ADJ_BBOX=116
  • IOB_INBUF=116
  • IOB_OFF1=5
  • IOB_OFF2=2
  • IOB_OFFDDRBLACKBOX=2
  • IOB_OUTBUF=163
  • IOB_PAD=163
  • SLICEL=1163
  • SLICEL_C1VDD=66
  • SLICEL_C2VDD=60
  • SLICEL_CYMUXF=112
  • SLICEL_CYMUXG=104
  • SLICEL_F=830
  • SLICEL_F5MUX=195
  • SLICEL_F6MUX=50
  • SLICEL_FFX=437
  • SLICEL_FFY=404
  • SLICEL_G=747
  • SLICEL_GNDF=46
  • SLICEL_GNDG=44
  • SLICEL_XORF=51
  • SLICEL_XORG=47
  • SLICEM=58
  • SLICEM_F=53
  • SLICEM_F5MUX=56
  • SLICEM_F6MUX=56
  • SLICEM_FFY=2
  • SLICEM_G=58
  • SLICEM_WSGEN=2
  • SPI_ACCESS=1
  • SPI_ACCESS_SPI_ACCESS=1
 
Configuration Data
BUFGMUX
  • S=[S_INV:6] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:6]
  • S=[S_INV:6] [S:0]
DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:2]
  • PSEN=[PSEN_INV:0] [PSEN:2]
  • PSINCDEC=[PSINCDEC:2] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:1]
DCM_DCM
  • CLKDV_DIVIDE=[2:1] [6:1]
  • CLKOUT_PHASE_SHIFT=[NONE:2]
  • CLK_FEEDBACK=[1X:2]
  • DESKEW_ADJUST=[9:2]
  • DFS_FREQUENCY_MODE=[LOW:2]
  • DLL_FREQUENCY_MODE=[LOW:2]
  • DUTY_CYCLE_CORRECTION=[TRUE:2]
  • FACTORY_JF1=[0XC0:2]
  • FACTORY_JF2=[0X80:2]
  • PSCLK=[PSCLK_INV:0] [PSCLK:2]
  • PSEN=[PSEN_INV:0] [PSEN:2]
  • PSINCDEC=[PSINCDEC:2] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:1]
DIFFMI_NDT_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:3]
  • IBUF_DELAY_VALUE=[DLY0:3]
  • IFD_DELAY_VALUE=[DLY0:3]
  • SEL_IN=[SEL_IN:3] [SEL_IN_INV:0]
DIFFMI_NDT_PAD
  • IOATTRBOX=[LVDS_33:3]
DIFFMTB
  • O1=[O1_INV:0] [O1:1]
DIFFMTB_OUTBUF
  • IN=[IN_INV:0] [IN:1]
  • SUSPEND=[3STATE:1]
DIFFMTB_PAD
  • IOATTRBOX=[LVDS_33:1]
DIFFSI_NDT_PAD
  • IOATTRBOX=[LVDS_33:3]
DIFFSTB_OUTBUF
  • SUSPEND=[3STATE:1]
DIFFSTB_PAD
  • IOATTRBOX=[LVDS_33:1]
IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:35]
  • IBUF_DELAY_VALUE=[DLY0:35]
  • IFD_DELAY_VALUE=[DLY0:35]
  • SEL_IN=[SEL_IN:35] [SEL_IN_INV:0]
IBUF_PAD
  • IOATTRBOX=[LVCMOS18:32] [LVCMOS33:3]
IOB
  • O1=[O1_INV:0] [O1:163]
  • O2=[O2:2] [O2_INV:0]
  • OCE=[OCE:0] [OCE_INV:2]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:5]
  • OTCLK2=[OTCLK2_INV:2] [OTCLK2:0]
  • SR=[SR:0] [SR_INV:3]
  • T1=[T1_INV:67] [T1:55]
IOB_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:116]
  • IBUF_DELAY_VALUE=[DLY0:116]
  • IFD_DELAY_VALUE=[DLY0:116]
  • SEL_IN=[SEL_IN:116] [SEL_IN_INV:0]
IOB_OFF1
  • CE=[CE:0] [CE_INV:2]
  • CK=[CK:5] [CK_INV:0]
  • D=[D:5] [D_INV:0]
  • LATCH_OR_FF=[FF:5]
  • OFF1_INIT_ATTR=[INIT0:5]
  • OFF1_SR_ATTR=[SRLOW:3]
  • OFFATTRBOX=[ASYNC:3]
  • SR=[SR:0] [SR_INV:3]
IOB_OFF2
  • CE=[CE:0] [CE_INV:2]
  • CK=[CK:0] [CK_INV:2]
  • D=[D:2] [D_INV:0]
  • LATCH_OR_FF=[FF:2]
  • OFF2_INIT_ATTR=[INIT0:2]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:163]
  • SUSPEND=[3STATE:163]
  • TRI=[TRI_INV:67] [TRI:55]
IOB_PAD
  • DRIVEATTRBOX=[8:37] [12:125] [16:1]
  • IOATTRBOX=[LVCMOS18:123] [LVCMOS33:40]
  • SLEW=[SLOW:163]
RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:1]
  • CLKB=[CLKB_INV:0] [CLKB:1]
  • ENA=[ENA_INV:0] [ENA:1]
  • ENB=[ENB_INV:0] [ENB:1]
  • SSRA=[SSRA_INV:0] [SSRA:1]
  • SSRB=[SSRB_INV:0] [SSRB:1]
  • WEA0=[WEA0:1] [WEA0_INV:0]
  • WEA1=[WEA1:1] [WEA1_INV:0]
  • WEA2=[WEA2:1] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:1]
  • WEB0=[WEB0:1] [WEB0_INV:0]
  • WEB1=[WEB1:1] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:1]
  • WEB3=[WEB3:1] [WEB3_INV:0]
RAMB16BWE_RAMB16BWE
  • CLKA=[CLKA_INV:0] [CLKA:1]
  • CLKB=[CLKB_INV:0] [CLKB:1]
  • DATA_WIDTH_A=[1:1]
  • DATA_WIDTH_B=[9:1]
  • ENA=[ENA_INV:0] [ENA:1]
  • ENB=[ENB_INV:0] [ENB:1]
  • SSRA=[SSRA_INV:0] [SSRA:1]
  • SSRB=[SSRB_INV:0] [SSRB:1]
  • WEA0=[WEA0:1] [WEA0_INV:0]
  • WEA1=[WEA1:1] [WEA1_INV:0]
  • WEA2=[WEA2:1] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:1]
  • WEB0=[WEB0:1] [WEB0_INV:0]
  • WEB1=[WEB1:1] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:1]
  • WEB3=[WEB3:1] [WEB3_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:1]
  • WRITE_MODE_B=[WRITE_FIRST:1]
SLICEL
  • BX=[BX_INV:2] [BX:482]
  • BY=[BY:364] [BY_INV:6]
  • CE=[CE:220] [CE_INV:0]
  • CIN=[CIN_INV:0] [CIN:102]
  • CLK=[CLK:503] [CLK_INV:2]
  • SR=[SR:60] [SR_INV:435]
SLICEL_CYMUXF
  • 0=[0:112] [0_INV:0]
  • 1=[1_INV:0] [1:112]
SLICEL_CYMUXG
  • 0=[0:104] [0_INV:0]
SLICEL_F5MUX
  • S0=[S0:195] [S0_INV:0]
SLICEL_F6MUX
  • S0=[S0:50] [S0_INV:0]
SLICEL_FFX
  • CE=[CE:201] [CE_INV:0]
  • CK=[CK:435] [CK_INV:2]
  • D=[D:435] [D_INV:2]
  • FFX_INIT_ATTR=[INIT0:424] [INIT1:13]
  • FFX_SR_ATTR=[SRLOW:424] [SRHIGH:13]
  • LATCH_OR_FF=[FF:437]
  • REV=[REV_INV:0] [REV:22]
  • SR=[SR:46] [SR_INV:383]
  • SYNC_ATTR=[ASYNC:437]
SLICEL_FFY
  • CE=[CE:202] [CE_INV:0]
  • CK=[CK:404] [CK_INV:0]
  • D=[D:398] [D_INV:6]
  • FFY_INIT_ATTR=[INIT0:390] [INIT1:14]
  • FFY_SR_ATTR=[SRLOW:390] [SRHIGH:14]
  • LATCH_OR_FF=[FF:404]
  • SR=[SR:30] [SR_INV:364]
  • SYNC_ATTR=[ASYNC:403] [SYNC:1]
SLICEL_XORF
  • 1=[1_INV:0] [1:51]
SLICEM
  • BX=[BX_INV:0] [BX:56]
  • BY=[BY:58] [BY_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • SR=[SR:2] [SR_INV:0]
SLICEM_CYMUXF
  • 0=[0:7] [0_INV:0]
  • 1=[1_INV:0] [1:7]
SLICEM_CYMUXG
  • 0=[0:4] [0_INV:0]
SLICEM_F
  • LUT_OR_MEM=[LUT:53]
SLICEM_F5MUX
  • S0=[S0:56] [S0_INV:0]
SLICEM_F6MUX
  • S0=[S0:56] [S0_INV:0]
SLICEM_FFX
  • CE=[CE:3] [CE_INV:0]
  • CK=[CK:5] [CK_INV:0]
  • D=[D:5] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:4] [INIT1:1]
  • FFX_SR_ATTR=[SRLOW:4] [SRHIGH:1]
  • LATCH_OR_FF=[FF:5]
  • SR=[SR:4] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:1] [SYNC:4]
SLICEM_FFY
  • CK=[CK:2] [CK_INV:0]
  • D=[D:2] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:2]
  • FFY_SR_ATTR=[SRLOW:2]
  • LATCH_OR_FF=[FF:2]
  • SYNC_ATTR=[ASYNC:2]
SLICEM_G
  • DI=[DI:2] [DI_INV:0]
  • G_ATTR=[SHIFT_REG:2]
  • LUT_OR_MEM=[LUT:56] [RAM:2]
SLICEM_WSGEN
  • CK=[CK:2] [CK_INV:0]
  • SYNC_ATTR=[ASYNC:2]
  • WE=[WE_INV:0] [WE:2]
SLICEM_XORF
  • 1=[1_INV:0] [1:4]
 
Pin Data
BSCAN
  • DRCK1=1
  • SEL1=1
  • SHIFT=1
  • TDI=1
  • TDO1=1
  • TDO2=1
  • UPDATE=1
BSCAN_BSCAN_BLACKBOX
  • DRCK1=1
  • SEL1=1
  • SHIFT=1
  • TDI=1
  • TDO1=1
  • TDO2=1
  • UPDATE=1
BUFGMUX
  • I0=6
  • O=6
  • S=6
BUFGMUX_GCLKMUX
  • I0=6
  • OUT=6
  • S=6
BUFGMUX_GCLK_BUFFER
  • IN=6
  • OUT=6
DCM
  • CLK0=2
  • CLKDV=1
  • CLKFB=2
  • CLKFX=1
  • CLKIN=2
  • LOCKED=1
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=1
DCM_DCM
  • CLK0=2
  • CLKDV=1
  • CLKFB=2
  • CLKFX=1
  • CLKIN=2
  • LOCKED=1
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=1
DIFFMI_NDT
  • DIFFI_IN=3
  • I=3
  • PAD=3
DIFFMI_NDT_DELAY_ADJ_BBOX
  • IBUF_OUT=3
  • SEL_IN=3
DIFFMI_NDT_INBUF
  • DIFFI_IN=3
  • OUT=3
  • PAD=3
DIFFMI_NDT_PAD
  • PAD=3
DIFFMTB
  • DIFFO_OUT=1
  • O1=1
  • PAD=1
DIFFMTB_OUTBUF
  • IN=1
  • OUTN=1
  • OUTP=1
DIFFMTB_PAD
  • PAD=1
DIFFSI_NDT
  • PAD=3
  • PADOUT=3
DIFFSI_NDT_PAD
  • PAD=3
DIFFSI_NDT_PADOUT_USED
  • 0=3
  • OUT=3
DIFFSTB
  • DIFFO_IN=1
  • PAD=1
DIFFSTB_DIFFO_IN_USED
  • 0=1
  • OUT=1
DIFFSTB_OUTBUF
  • DIFFO_IN=1
  • OUTP=1
DIFFSTB_PAD
  • PAD=1
IBUF
  • I=35
  • PAD=35
IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=35
  • SEL_IN=35
IBUF_INBUF
  • IN=35
  • OUT=35
IBUF_PAD
  • PAD=35
IOB
  • I=116
  • O1=163
  • O2=2
  • OCE=2
  • OTCLK1=5
  • OTCLK2=2
  • PAD=163
  • SR=3
  • T1=122
IOB_DELAY_ADJ_BBOX
  • IBUF_OUT=116
  • SEL_IN=116
IOB_INBUF
  • IN=116
  • OUT=116
IOB_OFF1
  • CE=2
  • CK=5
  • D=5
  • Q=5
  • SR=3
IOB_OFF2
  • CE=2
  • CK=2
  • D=2
  • Q=2
IOB_OFFDDRBLACKBOX
  • OFF1=2
  • OFF2=2
  • OFFDDR=2
IOB_OUTBUF
  • IN=163
  • OUT=163
  • TRI=122
IOB_PAD
  • PAD=163
RAMB16BWE
  • ADDRA0=1
  • ADDRA1=1
  • ADDRA10=1
  • ADDRA11=1
  • ADDRA12=1
  • ADDRA13=1
  • ADDRA2=1
  • ADDRA3=1
  • ADDRA4=1
  • ADDRA5=1
  • ADDRA6=1
  • ADDRA7=1
  • ADDRA8=1
  • ADDRA9=1
  • ADDRB10=1
  • ADDRB11=1
  • ADDRB12=1
  • ADDRB13=1
  • ADDRB3=1
  • ADDRB4=1
  • ADDRB5=1
  • ADDRB6=1
  • ADDRB7=1
  • ADDRB8=1
  • ADDRB9=1
  • CLKA=1
  • CLKB=1
  • DIA0=1
  • DIB0=1
  • DIB1=1
  • DIB2=1
  • DIB3=1
  • DIB4=1
  • DIB5=1
  • DIB6=1
  • DIB7=1
  • DIPB0=1
  • DOA0=1
  • ENA=1
  • ENB=1
  • SSRA=1
  • SSRB=1
  • WEA0=1
  • WEA1=1
  • WEA2=1
  • WEA3=1
  • WEB0=1
  • WEB1=1
  • WEB2=1
  • WEB3=1
RAMB16BWE_RAMB16BWE
  • ADDRA0=1
  • ADDRA1=1
  • ADDRA10=1
  • ADDRA11=1
  • ADDRA12=1
  • ADDRA13=1
  • ADDRA2=1
  • ADDRA3=1
  • ADDRA4=1
  • ADDRA5=1
  • ADDRA6=1
  • ADDRA7=1
  • ADDRA8=1
  • ADDRA9=1
  • ADDRB10=1
  • ADDRB11=1
  • ADDRB12=1
  • ADDRB13=1
  • ADDRB3=1
  • ADDRB4=1
  • ADDRB5=1
  • ADDRB6=1
  • ADDRB7=1
  • ADDRB8=1
  • ADDRB9=1
  • CLKA=1
  • CLKB=1
  • DIA0=1
  • DIB0=1
  • DIB1=1
  • DIB2=1
  • DIB3=1
  • DIB4=1
  • DIB5=1
  • DIB6=1
  • DIB7=1
  • DIPB0=1
  • DOA0=1
  • ENA=1
  • ENB=1
  • SSRA=1
  • SSRB=1
  • WEA0=1
  • WEA1=1
  • WEA2=1
  • WEA3=1
  • WEB0=1
  • WEB1=1
  • WEB2=1
  • WEB3=1
SLICEL
  • BX=484
  • BY=370
  • CE=220
  • CIN=102
  • CLK=505
  • COUT=104
  • F1=825
  • F2=774
  • F3=672
  • F4=548
  • F5=100
  • FX=28
  • FXINA=50
  • FXINB=50
  • G1=741
  • G2=688
  • G3=568
  • G4=453
  • SR=495
  • X=530
  • XB=5
  • XQ=437
  • Y=429
  • YQ=404
SLICEL_C1VDD
  • 1=66
SLICEL_C2VDD
  • 1=60
SLICEL_CYMUXF
  • 0=112
  • 1=112
  • OUT=112
  • S0=112
SLICEL_CYMUXG
  • 0=104
  • 1=104
  • OUT=104
  • S0=104
SLICEL_F
  • A1=825
  • A2=774
  • A3=672
  • A4=548
  • D=830
SLICEL_F5MUX
  • F=194
  • G=195
  • OUT=195
  • S0=195
SLICEL_F6MUX
  • 0=50
  • 1=50
  • OUT=50
  • S0=50
SLICEL_FFX
  • CE=201
  • CK=437
  • D=437
  • Q=437
  • REV=22
  • SR=429
SLICEL_FFY
  • CE=202
  • CK=404
  • D=404
  • Q=404
  • SR=394
SLICEL_G
  • A1=741
  • A2=688
  • A3=568
  • A4=453
  • D=747
SLICEL_GNDF
  • 0=46
SLICEL_GNDG
  • 0=44
SLICEL_XORF
  • 0=51
  • 1=51
  • O=51
SLICEL_XORG
  • 0=47
  • 1=47
  • O=47
SLICEM
  • BX=56
  • BY=58
  • CLK=2
  • F1=53
  • F2=53
  • F3=52
  • F4=51
  • F5=56
  • FX=28
  • FXINA=56
  • FXINB=56
  • G1=54
  • G2=53
  • G3=53
  • G4=53
  • SR=2
  • X=1
  • Y=29
  • YQ=2
SLICEM_CYMUXF
  • 0=7
  • 1=7
  • OUT=7
  • S0=7
SLICEM_CYMUXG
  • 0=4
  • 1=7
  • OUT=7
  • S0=7
SLICEM_F
  • A1=53
  • A2=53
  • A3=52
  • A4=51
  • D=53
SLICEM_F5MUX
  • F=53
  • G=56
  • OUT=56
  • S0=56
SLICEM_F6MUX
  • 0=56
  • 1=56
  • OUT=56
  • S0=56
SLICEM_FFX
  • CE=3
  • CK=5
  • D=5
  • Q=5
  • SR=4
SLICEM_FFY
  • CK=2
  • D=2
  • Q=2
SLICEM_FMC15_BLACKBOX
  • MC15=23
  • WS2=23
SLICEM_G
  • A1=54
  • A2=53
  • A3=53
  • A4=53
  • D=58
  • DI=2
  • WS=2
SLICEM_GMC15_BLACKBOX
  • MC15=41
  • WS2=41
SLICEM_GNDF
  • 0=7
SLICEM_GNDG
  • 0=4
SLICEM_VDDG
  • 1=3
SLICEM_WSGEN
  • CK=2
  • WE=2
  • WSG=2
SLICEM_XORF
  • 0=4
  • 1=4
  • O=4
SLICEM_YBUSED
  • 0=17
  • OUT=17
SPI_ACCESS
  • CLK=1
  • CSB=1
  • MISO=1
  • MOSI=1
SPI_ACCESS_SPI_ACCESS
  • CLK=1
  • CSB=1
  • MISO=1
  • MOSI=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -p xc3s400an-fgg400-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s400an-fgg400-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 5 5 0 0 0 0 0
bitgen 47 47 0 0 0 0 0
cse_server 8 8 0 0 0 0 0
map 63 59 0 0 0 0 0
ngcbuild 36 36 0 0 0 0 0
ngdbuild 64 64 0 0 0 0 0
par 59 47 12 0 0 0 0
trce 47 47 0 0 0 0 0
xst 61 61 0 0 0 0 0
 
Project Statistics
PROPEXT_xilxSynthMaxFanout_virtex2=100000 PROP_Enable_Message_Filtering=false
PROP_FitterReportFormat=HTML PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked) PROP_ManualCompileOrderImp=false
PROP_PropSpecInProjFile=Store all values PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2014-04-05T11:13:55 PROP_intWbtProjectID=8E47CDE824FA08BFEBA5F108DC27ACA9
PROP_intWbtProjectIteration=42 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_CompxlibEdkSimLib=false
PROP_DevFamily=Spartan3A and Spartan3AN PROP_DevDevice=xc3s400an
PROP_DevFamilyPMName=spartan3a PROP_DevPackage=fgg400
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-4
PROP_PreferredLanguage=Verilog FILE_UCF=2
FILE_VERILOG=28
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=7 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=20
NGDBUILD_NUM_FDC=393 NGDBUILD_NUM_FDCE=379 NGDBUILD_NUM_FDCP=24 NGDBUILD_NUM_FDC_1=2
NGDBUILD_NUM_FDP=3 NGDBUILD_NUM_FDPE=24 NGDBUILD_NUM_FDR=1 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=25 NGDBUILD_NUM_IBUFDS=3 NGDBUILD_NUM_INV=86 NGDBUILD_NUM_IOBUF=116
NGDBUILD_NUM_LUT1=86 NGDBUILD_NUM_LUT2=218 NGDBUILD_NUM_LUT2_D=4 NGDBUILD_NUM_LUT2_L=1
NGDBUILD_NUM_LUT3=234 NGDBUILD_NUM_LUT3_L=6 NGDBUILD_NUM_LUT4=1054 NGDBUILD_NUM_LUT4_D=16
NGDBUILD_NUM_LUT4_L=33 NGDBUILD_NUM_MUXCY=216 NGDBUILD_NUM_MUXF5=247 NGDBUILD_NUM_MUXF6=78
NGDBUILD_NUM_MUXF7=28 NGDBUILD_NUM_OBUF=41 NGDBUILD_NUM_OBUFDS=1 NGDBUILD_NUM_OBUFT=6
NGDBUILD_NUM_ODDR2=2 NGDBUILD_NUM_SPI_ACCESS=1 NGDBUILD_NUM_SRL16=2 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=96
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=8 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=20 NGDBUILD_NUM_FDC=393
NGDBUILD_NUM_FDCE=379 NGDBUILD_NUM_FDCP=24 NGDBUILD_NUM_FDC_1=2 NGDBUILD_NUM_FDP=3
NGDBUILD_NUM_FDPE=24 NGDBUILD_NUM_FDR=1 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=150
NGDBUILD_NUM_IBUFDS=3 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=86 NGDBUILD_NUM_LUT1=86
NGDBUILD_NUM_LUT2=218 NGDBUILD_NUM_LUT2_D=4 NGDBUILD_NUM_LUT2_L=1 NGDBUILD_NUM_LUT3=234
NGDBUILD_NUM_LUT3_L=6 NGDBUILD_NUM_LUT4=1054 NGDBUILD_NUM_LUT4_D=16 NGDBUILD_NUM_LUT4_L=33
NGDBUILD_NUM_MUXCY=216 NGDBUILD_NUM_MUXF5=247 NGDBUILD_NUM_MUXF6=78 NGDBUILD_NUM_MUXF7=28
NGDBUILD_NUM_OBUF=41 NGDBUILD_NUM_OBUFDS=1 NGDBUILD_NUM_OBUFT=122 NGDBUILD_NUM_ODDR2=2
NGDBUILD_NUM_SPI_ACCESS=1 NGDBUILD_NUM_SRLC16E=2 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=96
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s400an-4-fgg400 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=100000 -bufg=24
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5