System Settings

 
Environment Settings
Environment Variable xst ngdbuild map par
PATHEXT .COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.MSC		 .COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.MSC		 .COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.MSC		 .COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.MSC
Path C:\Xilinx\12.1\ISE_DS\ISE\lib\nt;
C:\Xilinx\12.1\ISE_DS\ISE\bin\nt;
C:\Xilinx\12.1\ISE_DS\PlanAhead\bin;
C:\Xilinx\12.1\ISE_DS\EDK\bin\nt;
C:\Xilinx\12.1\ISE_DS\EDK\lib\nt;
C:\Xilinx\12.1\ISE_DS\common\bin\nt;
C:\Xilinx\12.1\ISE_DS\common\lib\nt;
C:\Program Files\Common Files\Microsoft Shared\Windows Live;
C:/ti/mcsdk_2_1_1_4/xdctools_3_23_04_60;
C:\windows\system32;
C:\windows;
C:\windows\System32\Wbem;
C:\windows\System32\WindowsPowerShell\v1.0\;
C:\Program Files\Windows Live\Shared;
C:\cygwin\bin;
C:\ti\ccsv5\tools\compiler\c6000\bin;
C:\Program Files\doxygen\bin;
C:\Program Files\Texas Instruments Fusion Digital Power Designer\bin;
C:\ti\xdctools_3_23_01_43;
C:\Program Files\CVSNT\		 C:\Xilinx\12.1\ISE_DS\ISE\lib\nt;
C:\Xilinx\12.1\ISE_DS\ISE\bin\nt;
C:\Xilinx\12.1\ISE_DS\PlanAhead\bin;
C:\Xilinx\12.1\ISE_DS\EDK\bin\nt;
C:\Xilinx\12.1\ISE_DS\EDK\lib\nt;
C:\Xilinx\12.1\ISE_DS\common\bin\nt;
C:\Xilinx\12.1\ISE_DS\common\lib\nt;
C:\Program Files\Common Files\Microsoft Shared\Windows Live;
C:/ti/mcsdk_2_1_1_4/xdctools_3_23_04_60;
C:\windows\system32;
C:\windows;
C:\windows\System32\Wbem;
C:\windows\System32\WindowsPowerShell\v1.0\;
C:\Program Files\Windows Live\Shared;
C:\cygwin\bin;
C:\ti\ccsv5\tools\compiler\c6000\bin;
C:\Program Files\doxygen\bin;
C:\Program Files\Texas Instruments Fusion Digital Power Designer\bin;
C:\ti\xdctools_3_23_01_43;
C:\Program Files\CVSNT\		 C:\Xilinx\12.1\ISE_DS\ISE\lib\nt;
C:\Xilinx\12.1\ISE_DS\ISE\bin\nt;
C:\Xilinx\12.1\ISE_DS\PlanAhead\bin;
C:\Xilinx\12.1\ISE_DS\EDK\bin\nt;
C:\Xilinx\12.1\ISE_DS\EDK\lib\nt;
C:\Xilinx\12.1\ISE_DS\common\bin\nt;
C:\Xilinx\12.1\ISE_DS\common\lib\nt;
C:\Program Files\Common Files\Microsoft Shared\Windows Live;
C:/ti/mcsdk_2_1_1_4/xdctools_3_23_04_60;
C:\windows\system32;
C:\windows;
C:\windows\System32\Wbem;
C:\windows\System32\WindowsPowerShell\v1.0\;
C:\Program Files\Windows Live\Shared;
C:\cygwin\bin;
C:\ti\ccsv5\tools\compiler\c6000\bin;
C:\Program Files\doxygen\bin;
C:\Program Files\Texas Instruments Fusion Digital Power Designer\bin;
C:\ti\xdctools_3_23_01_43;
C:\Program Files\CVSNT\		 C:\Xilinx\12.1\ISE_DS\ISE\lib\nt;
C:\Xilinx\12.1\ISE_DS\ISE\bin\nt;
C:\Xilinx\12.1\ISE_DS\PlanAhead\bin;
C:\Xilinx\12.1\ISE_DS\EDK\bin\nt;
C:\Xilinx\12.1\ISE_DS\EDK\lib\nt;
C:\Xilinx\12.1\ISE_DS\common\bin\nt;
C:\Xilinx\12.1\ISE_DS\common\lib\nt;
C:\Program Files\Common Files\Microsoft Shared\Windows Live;
C:/ti/mcsdk_2_1_1_4/xdctools_3_23_04_60;
C:\windows\system32;
C:\windows;
C:\windows\System32\Wbem;
C:\windows\System32\WindowsPowerShell\v1.0\;
C:\Program Files\Windows Live\Shared;
C:\cygwin\bin;
C:\ti\ccsv5\tools\compiler\c6000\bin;
C:\Program Files\doxygen\bin;
C:\Program Files\Texas Instruments Fusion Digital Power Designer\bin;
C:\ti\xdctools_3_23_01_43;
C:\Program Files\CVSNT\
XILINX C:\Xilinx\12.1\ISE_DS\ISE C:\Xilinx\12.1\ISE_DS\ISE C:\Xilinx\12.1\ISE_DS\ISE C:\Xilinx\12.1\ISE_DS\ISE
XILINX_DSP C:\Xilinx\12.1\ISE_DS\ISE C:\Xilinx\12.1\ISE_DS\ISE C:\Xilinx\12.1\ISE_DS\ISE C:\Xilinx\12.1\ISE_DS\ISE
XILINX_EDK C:\Xilinx\12.1\ISE_DS\EDK C:\Xilinx\12.1\ISE_DS\EDK C:\Xilinx\12.1\ISE_DS\EDK C:\Xilinx\12.1\ISE_DS\EDK
XILINX_PLANAHEAD C:\Xilinx\12.1\ISE_DS\PlanAhead C:\Xilinx\12.1\ISE_DS\PlanAhead C:\Xilinx\12.1\ISE_DS\PlanAhead C:\Xilinx\12.1\ISE_DS\PlanAhead
 
Synthesis Property Settings
Switch Name Property Name Value Default Value
-ifn   shevm_fpga.prj  
-ifmt   mixed MIXED
-ofn   shevm_fpga  
-ofmt   NGC NGC
-p   xc3s200an-4-ftg256  
-top   shevm_fpga  
-opt_mode Optimization Goal Speed SPEED
-opt_level Optimization Effort 1 1
-iuc Use synthesis Constraints File NO NO
-lso Library Search Order shevm_fpga.lso  
-keep_hierarchy Keep Hierarchy NO NO
-netlist_hierarchy Netlist Hierarchy as_optimized as_optimized
-rtlview Generate RTL Schematic Yes NO
-glob_opt Global Optimization Goal AllClockNets ALLCLOCKNETS
-read_cores Read Cores YES YES
-write_timing_constraints Write Timing Constraints NO NO
-cross_clock_analysis Cross Clock Analysis NO NO
-bus_delimiter Bus Delimiter <> <>
-slice_utilization_ratio Slice Utilization Ratio 100 100%
-bram_utilization_ratio BRAM Utilization Ratio 100 100%
-verilog2001 Verilog 2001 YES YES
-fsm_extract   YES YES
-fsm_encoding   Auto AUTO
-safe_implementation   No NO
-fsm_style   lut LUT
-ram_extract   Yes YES
-ram_style   Auto AUTO
-rom_extract   Yes YES
-shreg_extract   YES YES
-rom_style   Auto AUTO
-auto_bram_packing   NO NO
-resource_sharing   YES YES
-async_to_sync   NO NO
-mult_style   auto AUTO
-iobuf   YES YES
-max_fanout   500 500
-bufg   24 24
-register_duplication   YES YES
-register_balancing   No NO
-optimize_primitives   NO NO
-use_clock_enable   Yes YES
-use_sync_set   Yes YES
-use_sync_reset   Yes YES
-iob   auto AUTO
-equivalent_register_removal   YES YES
-slice_utilization_ratio_maxmargin   5 0%
 
Translation Property Settings
Switch Name Property Name Value Default Value
-intstyle   ise None
-dd   _ngo None
-p   xc3s200an-ftg256-4 None
-uc   gauss_evm_fpga.ucf None
 
Map Property Settings
Switch Name Property Name Value Default Value
-ir Use RLOC Constraints OFF OFF
-cm Optimization Strategy (Cover Mode) area area
-intstyle   ise None
-o   shevm_fpga_map.ncd None
-pr Pack I/O Registers/Latches into IOBs off off
-p   xc3s200an-ftg256-4 None
 
Place and Route Property Settings
Switch Name Property Name Value Default Value
-t   1 1
-intstyle   ise  
-ol Place & Route Effort Level (Overall) high std
-w   true false
 
Operating System Information
Operating System Information xst ngdbuild map par
CPU Architecture/Speed Intel(R) Core(TM)2 Duo CPU E7500 @ 2.93GHz/2926 MHz Intel(R) Core(TM)2 Duo CPU E7500 @ 2.93GHz/2926 MHz Intel(R) Core(TM)2 Duo CPU E7500 @ 2.93GHz/2926 MHz Intel(R) Core(TM)2 Duo CPU E7500 @ 2.93GHz/2926 MHz
Host EIDLCPU1013 EIDLCPU1013 EIDLCPU1013 EIDLCPU1013
OS Name Microsoft Microsoft Microsoft Microsoft
OS Release Service Pack 1 (build 7601) Service Pack 1 (build 7601) Service Pack 1 (build 7601) Service Pack 1 (build 7601)