Verification of 45nm Wireless Mobile System On Chip (SoC)
Executive Summary
Our customer is a leading European semiconductor company.

The 45 nm SoC is a low-cost, multi-feature ARM processor based single chip solution supporting features like Ultra-Low Power Bluetooth, GPS, and FM. The chip is targeted at next generation mobile phones.
With a view to retain its leadership in the consumer electronics market and further its standing in the global arena, our customer sought a long-term offshore partner who could help them meet their objectives of cost-effective offshore engagement and skilled ASIC verification resources for verifying a 45nm ASIC.
eInfochips took the complete ownership of the verification processes and offered 100% functional and code coverage on the 45nm chip which had multiple IP blocks and wireless technologies. eInfochips' team developed an OVM based verification environment and used mixed languages to execute cluster and SoC level verification successfully through measurable deliverables.
The Customer
Our customer creates semiconductors, system solutions and software that deliver better sensory experiences in TVs, set-top boxes, identification applications, mobile phones, cars and a wide range of other electronic devices.
The Challenge
- To verify a multi-clock 22 million gate count SoC with various IP blocks and wireless technologies like FM, Bluetooth and GPS
The Solution
eInfochips' ASIC team offered the following verification services:
- Set-up a System Verilog, SystemC & VHDL based Mixed language Verification Environment comprising of:
- SC BFM
- SV Monitors, Predictors
- SV Functional Coverage
- VHDL BF
- SoC full chip verification and grey box verification
- Developed reusable system level verification environment
- Developed reusable sub-system level verification environment using Open Verification Methodology (OVM)
- Designed and developed major Verification Components for FM, BT and GPS at SoC level
Technology
- Industry: Consumer Electronics
- Technology: Ultra-Low Power Bluetooth, FM, GPS
- Gate Count: 22 Million
- Methodology: OVM, Mixed language
- Languages: SystemC, VHDL, SystemVerilog
- Tools: IUS6.2, Specman 6.2, Vmanager, RVCT 3.1
The Benefit
- eInfochips delivered a first-time-right solution to the customer through its rich technical expertise in ASIC verification
- Achieved 100% code and functional coverage
- eInfochips implemented an advanced verification methodology (without impacting project schedule) which expedited overall verification and enhanced the quality of verification