DO-254 Compliant GPS ASIC Verification

Executive Summary

Our customer is a leader in the design, production and support of communication and aviation electronics for customers worldwide.

The ASIC had five primary functions:

  • GPS specific Analog to Digital signal processing
  • GPS specific digital signal sampling
  • Power management and control
  • Input/output control
  • Software processing

The customer was interested in outsourcing verification of a complex 10 million gate count GPS ASIC design as per DO-254 design assurance guidelines.

eInfochips was engaged as a verification partner to deliver level-A quality standard solutions within stringent project timelines. Our ASIC team developed an OVM compliant verification environment in SystemVerilog and achieved 100% functional coverage.

The Customer

Our customer provides communication, navigation and display solutions, as well as integrated system solutions and services, enables battle space superiority and enhanced situational awareness for airborne, ground and shipboard applications. Their advanced capabilities include Next-generation information and flight display systems, Cabin information systems, In-flight entertainment systems including live, multiregion airborne TV, audio/video-on-demand, moving maps, real-time email and Internet access, and more.

The Challenge

  • Level-A criticality of ASIC verification
  • Had to achieve 100% functional coverage for a 10 million gate complex ASIC
  • Strict compliance to DO-254 design assurance guidelines

The Solution

eInfochips performed following ASIC verification services:

  • Developed Test bench model on TLM (Transaction Level Modeling) concept
  • Developed verification environment in Open Verification Methodology (OVM)
  • Followed requirement based and coverage driven verification process
  • Automated stimulus generation with the help of sequencers
  • Performed directed and constrained random testing to achieve maximum coverage
  • DO-254 design assurance guidelines compliant ASIC verification

Technology

  • Industry: Avionics / Defense
  • Gate Count: 10 Million
  • Methodology: Open Verification Methodology (OVM), Coverage Driven Verification
  • Languages: SystemVerilog
  • Tools: QuestaSim

The Benefit

  • eInfochips team executed verification of a complex 10 million gate count ASIC on-schedule and within budget
  • Enabled customer with re-usable and scalable verification environment using advanced verification methodologies (OVM, CDV) for future enhancements