ChipMaestro from eInfochips Extends SoC Design
and Verification Expertise to Computer Peripherals and Communications
markets
- New service leverages 500+ man-years
of expertise in designing and verifying complex chips
- Expanded service offering enables customers
to focus limited resources on core competencies
Santa Clara, CA - May 23, 2005 - eInfochips, Inc., today introduced ChipMaestro, a portfolio of domain
expertise, IP and services to support ASIC development in the consumer
electronics, communications and computer peripherals markets. As
a leading provider of ASIC design and verification services, eInfochips
has brought together IP cores, verification IP and design and verification
expertise to support clients over the entire lifecycle of ICs in
these volatile markets. Because verification against industry standards,
successful tapeout on complex processes and organized product life
management are essential to success in today's ASIC market, ChipMaestro
goes far beyond conventional design services.
"ChipMaestro combines several areas of expertise that are unique
to eInfochips and then focuses them on specific market segments",
said Tapan Joshi, vice president of marketing, eInfochips. "ChipMaestro,
incorporates our extensive domain experience, design and verification
IP and customized design flow to the needs of specific markets.
This makes it easier for customers to entrust their design, verification
and sustaining engineering tasks to us."
ChipMaestro was developed to address the four major challenges
facing silicon vendors:
Increased complexity of SoCs with multiple 3rd party IPs and
/or emerging standards
ChipMaestro combines IP-based design services with eInfochips'
experience in IP integration, including domain expertise in industry
standard bus interfaces, communication protocols and SAN technologies.
Replacing traditional verification with HVL-based verification
using verification IP
ChipMaestro offers Hardware Verification Language (HVL) based verification
expertise and a layered, object oriented verification environment.
This unique verification methodology provides scalability, modularity,
and reusability, reducing verification time and overall development
cost.
Integration of cross-functional and multi-locational development
teams
ChipMaestro's Amplified Offshoring Model™ follows a clearly
defined project management methodology and helps manage all activities
throughout the chip development lifecycle for successful tapeout.
An onsite engineer acts as the link between the customer and the
eInfochips' offshore center. The customer need not worry about an
entire team spanning multiple locations.
Scarcity of resources to extend product life cycles
Today a design team's needs don't stop at first silicon. ChipMaestro
enables customers to keep existing products competitive in volatile
markets without tying down crucial engineers. Feature enhancement,
technology/process migration and sustaining-engineering services
help extend product lifecycles and efficiently manage design stages.
Design modification services to provide incremental changes for
existing designs, ensure massive cost savings.
Price and Availability
For pricing information on verification and design IPs, please
email sales@einfochips.com
About eInfochips Inc.
eInfochips Inc., based in Santa Clara, is a leading provider of
cutting edge ASIC design and verification services, Embedded systems
solutions and IP cores. Their capabilities extend from Specification
to Silicon, with knowledge spanning design entry, automated verification
methodologies using HVLs, verification component development, PLI,
physical layout & implementation and board design. A partial list
of customers includes ATI, Rambus, Texas Instruments, Cisco, Cypress
Semiconductors, Sun Microsystems, Philips, Broadcom, AMCC.
Contact:
Donna Wilson
Phone # 510-794-9557
bw_a@sbcglobal.net
ChipMaestro, VeriSuite and DSPKarma
are registered trademarks |
