20080613-HDMI UVC for verification of HDMI
eInfochips releases highly configurable, Early Access OVM Ready HDMI UVC for verification of HDMI compliant devices
Strengthens Cadence Verification Alliance membership
Santa Clara, CA Â June 13, 2008 - eInfochips, Inc., a leading IP leveraged design Services Company offering silicon design and verification, product realization and application software services today announced the availability of their Early Access HDMI 'Open Verification Methodology' (OVM) Ready Universal Verification Component (UVC).
eInfochips' HDMI UVC is a ready-made highly configurable, reusable, scalable and extensible verification component that is suitable for verification of HDMI source (transmitter) and/or HDMI sink (receiver).
HDMI has quickly emerged as the standard interface for connecting High-Definition (HD) components such as HDTVs, DVD players, set-top boxes and A/V receivers. HDMI can carry high quality multi-channel audio data and can carry all standard and high definition consumer electronics video format. Content protection technology is available. HDMI can also carry control and status information in both directions.
Being an OVM Ready UVC ensures that the HDMI UVC conforms to True Open Source license agreement. The UVC has been thoroughly verified on Cadence Design System's Incisive functional verification platform. Designers can also benefit with the OVM Ready UVC's interoperability features enabling plug and play functionality across ecosystems, simulators and other higher level languages.
"HDMI has quickly become the de facto standard for connecting consumer electronic devices. By delivering crystal-clear all digital video and audio quality via a single cable, HDMI helps provide consumers with the ultimate home theater experience," said Nirav Shah, Director Marketing at eInfochips Inc. "With the broad industry focus on HDMI product delivery, eInfochips' release of an Early Access OVM Ready UVC is a major milestone and should help rapid deployment of HDMI technology in the industry."
eInfochips is a valued Cadence Verification Alliance member with proven spec to silicon to system capabilities and has executed 100+ complex Chip/SoC design and verification projects. As a long-time Cadence Verification Alliance member, eInfochips has expertise in Specman Elite, Cadence® Incisive® Plan-to-Closure (IPCM) & Open Verification Methodology (OVM) and offers design verification services / consultation both onsite and offshore.
Availability
Deliverables include fully verified UVC code with User guide, release notes and test suite. eInfochips' verification experts meet customer requirements related to integrating UVCs into test environment and other support related issues.
The Early Access UVC is available from eInfochips. For pricing details please write in to:
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About the OVM
The OVM is the result of joint development between Cadence and Mentor Graphics to facilitate true SystemVerilog interoperability with a standard library and a proven methodology. Completely open, it combines the best of the Cadence Open Verification Methodology (OVM) and the Mentor Advanced Verification Methodology (AVM), and is usable on two-thirds of the world's SystemVerilog simulators. The OVM will also facilitate the development and usage of plug-and-play verification IP (UVC) written in SystemVerilog (IEEE 1800), SystemC® (IEEE 1666), and e (IEEE 1647) languages. For more information please visit: http://www.ovmworld.org/index.php
About eInfochips
eInfochips is a leading spec to silicon to system services company with expertise in ASIC/SoC design & verification, product realization, IP cores and application software. The company's India and U.S. centers have delivered SoC and embedded solutions to a variety of customers thus increasing cost-effectiveness, reducing time-to-market and growing their market strength. For more information please visit www.einfochips.com
