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1. Saving
Supercomputing with FPGAs
For reconfigurable computing, however, all the middle levels
are missing. FPGAs certainly take advantage of the latest semiconductor
processes and offer useable logic structures up to about the MSI
level (complex gates, multipliers, etc.), but everything between
there and the applications layer is not yet invented. There is not
yet even the equivalent of a BIOS for an FPGA-based reconfigurable
computer that isolates the OS (if we had one) from the particulars
of each specific hardware configuration. More...
- By Kevin Morris, FPGA and Structured
ASIC Journal
2. ASIC
prototyping: make versus buy
IC designers often spend as much as 60 to 80% of their time
simply verifying designs, and that percentage is growing. To get
a leg up on verification, many design groups have turned to hardware-assisted
verification to prototype their designs. More...
- By Michael Santarini, Senior Editor
3. Cab rides into the future
of automotive infotainment
Full color, high resolution global positioning street and
location information data runs on the cradle-mounted iPAQ, linked
to a rooftop micro-antenna. The unit has 125 megabytes of main memory
with a 0.5 gigabyte removable storage media card. More...
- By Richard Wallace, editorial director of CMP Media’s Electronics
Group
4. Back
to the drawing board on multicores, multiprocessing
In embedded digital-signal-processing applications, multiprocessor
chips are becoming attractive for an expanding range of systems
— even cost-sensitive app like consumer products. As a result, effective
software development for multiprocessor systems is vital.
More...
- By Jeff Bier
5. Power
Considerations in Designing with 90m FPGAs
The adoption of FPGAs in more markets and systems every year
reflects the successful efforts of leading FPGA vendors to push
the envelope in process technology, performance/density, and price.
Recently however, the move to 90nm has challenged FPGA vendors to
do more than just extract maximum density, features, and clock cycles.
More...
- By Telikepalli, Xilinx, Inc
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Technology
Showcase
The physical realization of
the clock tree network constrains the chip design, and it
directly impacts the control of clock skew and jitter. Further,
the clock network impacts overall chip power and area because
of the large number of buffers and repeaters that are inserted
during clock tree synthesis Read
More...
- By Udhaya Kumar, eInfochips
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eInfochips
Partner Showcase
However, the doubling time, now codified
by the Semiconductor Industry Association (SIA) International
Technology Roadmap for Semiconductors (ITRS), may be stretching
out to three years as we approach the fundamental atomic limits
of the materials used for semiconductor fabrication. Metal
widths on advanced ICs are now only a few dozen atoms wide
and gate oxides are less than 10 atoms thick. Read
More...
- By Steve Leibson, Tensilica
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eInfochips Corner
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Customer
Success Story
Manufacturing Diagnostic Application
for network management systems
Manufacturing Diagnostics application development enabled
in verifying on-chip peripherals like SDRAM, Flash, UART,
PRO/SLIC, Network Processor Engines, USB, PCI, and Mini-PCI
Read
More...
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Event
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News |
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TIDC 2005
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Avtar Saini joins eInfochips board
more...
eInfochips Strengthens RTL-to-GDSII
Design Service Capabilities, Adopts Magma IC Implementation
Flow more...
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Visit us at booth # G4
TIDC India 2005, NIMHANS Convention Center, Bangalore
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