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eInfochips' Corner
Technology Showcase
.NET Code Analysis Tool
FxCop is a code analysis tool that checks .NET managed code
(code that targets the .NET Framework common language runtime)
assemblies (executable file or DLL) for conformance to the Microsoft
.NET Framework Design Guidelines for writing robust and easily
maintainable code using the .NET Framework. Read
more...
- By Ami Shah
| Partner Showcase
HD-video encoding with DSP and FPGA partitioning
Implementing a scalable video-encoding
architecture that includes DSPs and, when necessary,
FPGAs as coprocessors to offload certain tasks satisfies
even the most demanding video applications.Read More...
- By Cheng Peng & Thanh
Tran, Texas Instruments
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Featured
Service |
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| eInfochips’
ARM based SoC and Product Design Services
eInfochips offers silicon and product design services
on ARM platform. eInfochips has successfully delivered
chip and embedded solutions to technology companies worldwide
in the consumer, multimedia and communications space.more... |
1. Embedded-system validation spans inception
to signoff
The successful development of embedded systems requires
the continuous integration of hardware and firmware throughout
all stages of the project. Transaction-level simulation aids
in architecture development and refinement.Read
More...
- By Jim Kenney
2. Standard
Debug Interface Socket Requirements For OCP-Compliant SoC
The OCP-IP Debug Working Group addresses the definition
of debug resources and integration to enable comprehensive debug
of OCP based systems. Contributors include OCP-IP companies
addressing the need for debug solutions and/or debug of the
OCP Infrastructure.
.Read
More...
- By Neal Stollon, Bob Uvacek & Gilbert Laurenti
3. IP Core for an H.264 Decoder SoC
This paper presents the development of an IP core for
an H.264 decoder. This state-of-the-art video compression standard
contributes to reduce the huge demand for bandwidth and storage
of multimedia applications.Read
More...
- By Nan Wang, Azeez Sanusi and Magdy A. Bayoumi
4. Synthesizable
Switching Logic For Network-On-Chip Designs on 90nm Technologies
Study on synthesizable switch structures for network-on-chip
designs is presented. Sum-of-products one-hot multiplexing is
identified as an appealing general-purpose choice with a low
latency and an acceptable resource utilization on both ASIC
and FPGA.Read
More...
- By Tapani Ahonen
5. IP-based
design for analogue ASICs: A case study
Adoption of transaction level modeling and the necessary
tools for debugging and analysis has been slower than would
be expected from growing SOC design sizes and complexities.
This paper discusses ways to improve the adoption rate by improving
the usability and simplifying the modeling concepts.Read
More...
- By Levi Timothée, Lewis Noëlle, Tomas Jean &
Fouillat Pascal
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