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eInfochips Corner
Technology
Showcase
Use
VCAT with LCAS in SONET/SDH as an optimal transport mechanism
Virtual concatenation (VCAT) in SONET/SDH works across the existing
infrastructure and can significantly increase network utilization
by effectively spreading the load across the whole network Read
more...
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By Snehal Panchal, eInfochips
| Partner
Showcase
Optimizing power consumption
in embedded DSP designs
DSP-based equipments often combine
applications that were previously separate, and each application
may have multiple operating modes. Read
More...
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By Jim Patterson
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Customer Success Story |
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| Product
design: Multi-channel Video surveillance system
The product design services included development of the complete
surveillance system, a two-board solution having 4 channels
TI DM642 and ARM 9 based host processor board more... |
1. SystemVerilog reference
verification methodology: RTL
The purpose of the VMM for SystemVerilog
is twofold. First, it is intended to educate users about the best
practices shown to be effective in assembling a repeatable, productive
and robust verification methodology More...
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By Thomas Anderson, Janick Bergeron, Eduard Cerny, Alan Hunter,
and Andrew Nightingale
2. Reverse
Disaggregation - How Silicon IP Will Change the Semiconductor Supply
Chain
So IP will emerge as is a key ingredient in the new supply
chain, brought on by the requirements of the Global Giants, reversing
the disaggregation forces that up until now dictated the construction
of the semiconductor market supply chain More...
- By Kevin Walsh
3. Constraint management
eases board design
Shorter pc board design cycle times have become a common
problem. Designers are also grappling with drastically changing
board technologies that deal with faster speeds and sophisticated
IC packages, introducing complexity to the simplest of design flows
More...
- By Humair Mandavia
4. Saving
power with DSPs in portable apps
Effective system-level board design requires good termination
of some specific pins, idling some peripherals, and taking advantage
of idle and power-down modes on the DSP More...
- By Naser Salameh
5. Optimization
techniques rein in IC power flows
Designing for low power consumption is a challenge that extends
throughout the entire chip industry now, from high-performance MPUs
to cell phone chip sets More...
- By David Lammers
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