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February 2008, Vol V Issue II
 


eInfochips' Corner

Designer's Corner Test Case Optimization more...
Technology Showcase

Handheld Biometrics Authentication System more...

Partner Showcase

Avoiding noise and EMI problems in DSP systems more...

Event
DVCon Expo

TIDC 2008
Booth # 327
Dallas, TX
Feb 26 ~ 28, '08

Technology Showcase
Handheld Biometrics Authentication System

Biometric technologies use individuals’ unique, measurable biological and behavioral traits to automatically verify their identities. These technologies are critical to domains such as person authorization in e-banking and e-commerce transactions or within the framework of access controls to security areas.
This paper describes the design and implementation of a Handheld Biometrics Authentication System that has attractive features which will tempt its customers to use it. Read more...

- By Madhura Borse, eInfochips


Partner Showcase
Avoiding noise and EMI problems in DSP systems

Noise and EMI can disrupt the operation of a DSP system or cause the design to fail FCC certification. Here's how to avoid these problems with PCB layout and return path decoupling. Read more...
- By Thanh Tran, Texas Instruments

partner showcase


Featured Success Story

 

DSP Controller Core
In-depth verification of DSP Controller Core that involved the development of various drivers, monitors and checkers. The core consisted of an advanced DSP processor with modem control interface. Read more...


1. Multi-language Functional Verification Coverage for Multi-site Projects
Today's design paradigm is changing rapidly " or to be more accurate it has already dramatically changed! Time to market pressures imply that most of today's SoC designs are re-use based derivative designs. This paradigm shift has created entirely new challenges for both design and verification teams, especially in the case of large projects that are developed throughout multiple sites. Read more...

- By Apurva Kalia

2. How to manage a billion cycles
After years discussing verification strategies with hundreds of ASIC designers, it finally hit me: We're at the point where designers are trying to manage billions of cycles of simulation. Read more...
- By Alain Raynaud


3. Accelerating High-Level SysML and SystemC SoC Designs
This research suggests that the automatic mapping of SysML, the system level UML based notations adopted by the OMG to SystemC, that was standardized by the IEEE, can raise the level of design abstraction in an automated environment and produce executable files. Read more...
- By Waseem Raslan, Ahmed Sameh

4. Improving design turn around time on a complex SoC by leveraging a reusable low power specification
This paper presents an approach to power design specification intent and associated enabled design methodologies that allow a scalable implementation of voltage islands. Read more...
- By Herve Menager, Michel Huiskes, Michel Korenhof

5. Infusing Speed and Visibility Into ASIC Verification
High-performance, high-capacity FPGAs typically involve complex combinations of hardware and embedded software (and also, possibly, application software). This is resulting in a verification crisis because detecting, isolating, debugging, and correcting bugs now consumes significantly more time, money, and engineering resources than creating the design in the first place. Read more...
- By Mario Larouche


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eInfochips is an Integrated Design Services company with over 6
50 engineers. The company offers Chip/ASIC/SoC, Embedded Product Realization and Application Software products and services


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