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April 2006, Vol III Issue IV
 


 


eInfochips Corner

Featured Service

eInfochips' SystemVerilog Services More...
Product Announcement SPI Verification Component More...
Technology Showcase SystemVerilog: A Panacea for Chip Verification? More...
Designer's Corner Using Polymorphism & Randomization in SystemVerilog More...
Event eInfochips to demonstrate Intelligent Surveillance System at DaVinci™ Technology Technical Seminar Series
News

EVE Selects eInfochips as Design Services Partner More...


Technology Showcase

SystemVerilog: A Panacea for Chip Verification?
SystemVerilog enables re-use of the legacy code and keeps engineers in the same domain while working on verification or design. Also, SystemVerilog being an evolution of Verilog with a verification subset, it comes with an advantage of reduced learning curve for designers.
- By Shailesh Dave, eInfochips Read more...

 

Partner Showcase
SoC processor is set for the big picture

Today's demanding consumer video applications often require the high performance of system-on-chip integration, yet SoC processing engines have created new challenges for system developers. SoCs have traditionally been based on closed architectures, giving developers Read More...

- By Jeremiah Golston


Featured Service

 

eInfochips' SystemVerliog Services
With strong background experience in conventional and HVL-based module & system-level verification, eInfochips provides best-in-class SystemVerilog based verification solutions to verify your complex chips/SoC
more...


1. SystemVerilog reference verification methodology: Introduction
Verification is the single biggest challenge in the design of system-on-chip (SoC) devices and reusable IP blocks. Traditional verification methods struggle to keep pace with the ever-increasing size and complexity of designs More...

- Thomas Anderson, Janick Bergeron, Eduard Cerny, Alan Hunter, and Andrew Nightingale

2. Using SystemVerilog Assertions in RTL Code
SystemVerilog Assertions (SVA) form an important subset of SystemVerilog, and as such may be introduced into existing Verilog and VHDL design flows More...
- Michael Smith

3. Design of SystemVerilog Assertion IP
SystemVerilog provides an effective means for designing assertion-based Verification IP and integrating it with a testbench More...
- By E. Cerny, J. Bergeron, M. K. Thottasseri and T. Anderson

4. A hierarchy of needs for SoC IP reuse
The semiconductor intellectual property (IP) industry is about 15 years old, but it seems that we are still far away from the dream of effective IP reuse on the scale that we need. In the early days, companies could have a legitimate IP make versus buy discussion for their next chip More...
- By Warren Savage

5. FPGAs for prototyping - ASICs for production
FPGAs are a valuable technology for designing and prototyping digital logic into medium-volume, medium-density applications. Their high unit cost, however, makes an FPGA cost-prohibitive to move into production More...
- By Terry Danzer


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eInfochips is an Integrated Design Services company with over 450 engineers. The company offers products and services in ASIC/SoC design & verification and Embedded systems development.


Tip of the Month

Using Polymorphism & Randomization in SystemVerilog


eInfochips Ramps Up Operations

Opens New Design Center in Ahmedabad
&
Second Design Center in Pune