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Top Stories of the month
eInfochips' Corner
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Technology Showcase
A Design style
to simplify IP Integration and Verification
The challenge facing system
designers today is to use the available silicon to bring new products to
market within budget and in a reasonable time. This will become a serious
with the trend to incorporate more memory in the future: from 400k to 2M
bits. Challenges are also posed due to a tenfold increase in the size of
vendor and customer cores from 130k gates to 1.3M gates and in the lines
of code per new design. Read more...
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Partner Showcase
Floating-point
DSCs yield greener control systems
Digital signal controllers
(DSCs) offer the most advanced form of single-chip control processing
available for high-end embedded systems. DSCs with floating-point
architecture take fewer processing cycles, need less program memory, and
enable more computationally advanced algorithms that can help save energy
while extending system capabilities. Read
more...
- By Andrew Soukup,
Texas Instruments
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Featured Success Story
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Physical
(Post-fabricated silicon) verification of Internet Telephony SoC
We performed a thorough verification of a 17 Million gates Internet
telephony manager SoC on a board containing taped out Silicon sample
within a scheduled time frame.
Read more...
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1. Real-World Reuse: RTL Recycling
This paper presents the
theory that a method can be applied to recycling RTL code that in turn
leads to a design that can be easily reused on a new project. By applying
this method to the very real process of recycling RTL in the context of a
new project, the resultant code actually has been designed for reuse. Read
more...
- By Gordon Walker, Tom Dewey
2. Automation in IP based SoC development
An IP based development methodology for building
system-on-a-chip solution is described. The methodology is illustrated
through a memory centric SoC architecture template intended for streaming
data applications such as video and audio. This template provides a basic
computation framework and realized by integrating the IP’s from a reusable
IP portfolio including necessary software components. An automated
development and verification methodology is proposed that can address the
platform level configurability, efficient system integration and
verification. Read
more...
- By Haridas V, Ramchandra V, Santhosh K
3. A Configurable HW/SW Platform for Video Application
This paper presents a dedicated hardware platform for a fast video and
image data processing to real time application. The platform supports
simultaneous HW/SW codesign and partitioning and based on the FPGA
technologies and on a RISC processor. This reduces application design
cycle. As an example, the H.263 video encoder is presented. Read
more...
- By A. Ben Atitallah, P. Kadionik, N. Masmoudi, H. Levi
4. Designing FPGA Based Reliable Systems Using Virtex-5 System
Monitor
To design the FPGA based systems, the choice of Virtex™-5 would be
appropriate, as in addition to its own technological and functional
advantages, Virtex™-5 FPGA adds the capability of monitoring (and taking
corrective actions like enabling the FPGA to go in power down mode etc) the
systems health. Read
more...
- By Sanjay Kulkarni
5. Design for Low-Power
Manufacturing Test
In this article, we'll first examine the
relationship between dynamic power consumption and test to determine why
managing power is more critical today than ever before. Then we'll explore
two distinct DFT methodologies that take advantage of recent advances in
automatic test pattern generation (ATPG) technology to automate generation
of low-power manufacturing tests. Read
more...
- By Chris Allsup
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