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October 2004, Vol I Issue XIII
 

  Welcome to the monthly issue of the Dashboard, your source for industry news in the ASIC & Embedded technology areas, and happenings at eInfochips.

Top Stories of the month
1 New DSP Technology for Multimode Wireless
2 Unlock and Load: Characterizing Today's PLLs
3

Flexible Embedded Processors for Developing Multi-Standard OFDM Broadcast Receivers

4 How FPGAs empower system-level design
5 FPGA design from the outside in

Technology Showcase:
Inside a hybrid verification model
The combination of languages, tools, intellectual property and methodologies has morphed the traditional ASIC design cycle into a "hybrid model" process. Many semiconductor companies have adopted the hybrid methodology to reduce risk and optimize time-to-market… Read more..


eInfochips Corner

Announcement

DSP Karma - eInfochips DSP Services
- Realize Your DSP Innovations! More..

Featured Product

Industry's first comprehensive Serial ATA verification component in SystemC. More..

Designer's Corner

Metastability & Synchronizers
Most of the ASIC's designed are driven by multiple Asynchronous Clocks which require special handling and understanding to ensure their timely completion More..

News

eInfochips Announces DSP-Karma, a fast-track to realizing DSP innovations.

 

 

eInfochips is an Integrated Design Services company with over 200 engineers exclusively focused on Electronics Systems Design and Verification.

The company offers products and services with expertise in the areas of ASIC/SoC design & verification and Embedded Systems development


 



Designer's Corner

Tip of the Month

Metastability & Synchronizers






 

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1. New DSP Technology for Multimode Wireless
With the advent of software-defined radio (SDR) platforms, designers now have the opportunity to create the ultimate multimode handset at lower cost with longer battery life, while eliminating the need for "forklift upgrades" to basestations and access equipment. More...
- By Nader Bagherzadeh, EE Times

2. Unlock and Load: Characterizing Today's PLLs
The phase-locked loop (PLL) has become one of the most versatile tools in the communication sector. PLLs are at the heart of circuits and devices ranging from clock recovery blocks in data communications systems to the local-oscillators that power cellular phones. And since their output frequency is always an exact multiple of the reference frequency, PLLs are the circuit of choice for frequency synthesizers, synchronous systems that require clock alignment and myriad applications, such as tracking satellite Doppler shift and sensing minute reactance changes in industrial proximity sensors. More...
- By: Marcus da Silva, Tektronix

3. Flexible Embedded Processors for Developing Multi-Standard OFDM Broadcast Receivers
In this paper we present a set of embedded digital signal processors to build a programmable OFDM receiver that can address a variety of broadcast formats as used for both digital television and digital radio in multiple geographic regions. A programmable solution is desirable for these applications, in order to improve time to market for emerging standards, as well as to reduce the cost of maintaining product lines for multiple geographic regions. While today ASIC solutions are commonplace, we describe in this paper how a set of specialized, embedded programmable digital signal processors can compose a practical system with respect to both silicon area and power consumption. By this approach, we achieve a high degree of programmability at the cost level comparable to ASIC solutions. More...
- By Paul Gruijters, Klaus J. Koch, Geoffrey Burns from Silicon Hive

4. How FPGAs empower system-level design
In the 1970s, 8-bit microprocessors became a commodity technology and electronics design changed very rapidly in response. The ability to partition part the design into a "soft" medium - programming the processor - had a profound effect on the industry. Now, any part of the design that could be moved into software could be changed, even after the product was manufactured. More...
- By Nick Martin , EEdesign.com

5. FPGA design from the outside in
FPGAs enable everyone to be a chip designer. This installment shows how to design the bus interface for a generic peripheral chip.

When designing with an embedded microprocessor, you always have to take into account, if not begin with, the actual pinout of the device. Each pin on a given microprocessor is uniquely defined by the manufacturer and must be used in a specific manner to achieve a specific function. Part of learning to design with embedded processors is learning the pin definitions. In contrast, field programmable gate array (FPGA) devices come to the design with pins completely undefined (except for power and ground). You have to define the FPGA's pins yourself. This gives you incredible flexibility but also forces you to think through the use of each pin. More... 
- By: Yves Gagnon, LTRIM Technologies

Technology Showcase
Inside a hybrid verification model

Over the past decade, the semiconductor industry has seen the evolution of myriad high-level languages for both design and verification. This proliferation has been compounded by the advent of a variety of point tools for each step of the ASIC design cycle. Last but not least, shrinking process geometries have enabled multimillion-gate systems-on-chip, adding another dimension of complexity to the development flow.

This combination of languages, tools, intellectual property and methodologies has morphed the traditional ASIC design cycle into a "hybrid model" process. With no readily available cookbook for selecting the best option for each stage of the cycle, many semiconductor companies have adopted the hybrid methodology to reduce risk and optimize time-to-market.. Read More..


eInfochips Corner

Announcment:
DSP Karma - eInfochips DSP Services
Optimize. Energize. Actualize
- Realize Your DSP Innovations!
DSPKarma is the suite of DSP Services that includes DSP Hardware, Software and System Integration More..


Featured Product
eInfochips' Serial ATA VC (Verification Component), developed in SystemC, offers a verification solution for SATA I, II (host and device) compliant cores. This is used to establish a complete Verification Environment, or as a plug-in to an existing environment for system level verification. More...
News
eInfochips Announces DSP-Karma, a fast-track to realizing DSP innovations.

A suite of DSP hardware, software and integration services with OEM-ready solutions More..

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