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eInfochips' Corner
Technology Showcase
Implementation of high speed streaming video
data transfer application on FPGA
This article talks about System-on-Chip architecture for storing
and transferring high speed data from image sensor to USB. This
paper highlights a FPGA based SoC architecture for a high resolution
streaming video capture device which takes care of low power
and high speed design issues. Read
more...
- By Kaushal D. Buch
| Partner Showcase
Next-generation VoIP and the role of DSP
Emerging technologies such
as high-definition voice are expanding the role of the
IP phone. Here's how to choose a DSP platform that can
keep up with the changes.Read
More...
- By Angela Raucher, Texas
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ARM based SoC and Product Design Services
eInfochips offers silicon and product design services
on ARM platform. eInfochips has successfully delivered
chip and embedded solutions to technology companies worldwide
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1. Practical Power Network Synthesis
For Power-Gating Designs
Although methodologies for power network synthesis
typically assume that design tools can freely size sleep transistors
for power gating, this assumption does not hold up for real-world
SoC designs. The method described in this article avoids this
unrealistic assumption and introduces the concept of a "fake
via".Read
More...
- By Kaijian Shi, Zhian Lin & Yi-Min Jiang
2. Software-Intensive
ASICs/ASSPs Demand Integrated Prototyping Solutions
FPGAs continue to march to the tune of Moore's Law with
new devices appearing at approximately 2-year intervals. we
estimate that over 90 percent of SoCs and ASICs are being prototyped
with FPGAs. So, what's driving the enthusiasm for ASIC prototyping?Read
More...
- By Andrew Haines
3. Design Constraint Verification and Validation: A New
Paradigm
Over the years, Electronic Design Automation (EDA) tools
have matured considerably. They now aid in design and verification
of all aspects of chip manufacturing. One area that has lagged
behind is the validation of design constraints. Read
More...
- By Jason Ware
4. A Platform
Based SoC Design Environment
This paper addresses issues faced and benefits of reusable
and SOC design environment for getting a verification closure,
synthesis and timing analysis in a platform-based SOC.Read
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- By Jeonghun Kim, Kyeongtae Moon, Jungwon Jeong & Suki
Kim
5. A Multi-Objective
Optimization Model for Energy and Performance Aware Synthesis
of NoC Architecture
This paper addresses the problem with special reference
to the topological mapping of intellectual Properties (IPs)
in the tiles of a meshbased NoC. The aim is to obtain the pareto
mappings that minimize: (i) the energy consumption and (ii)
maximum link bandwidth, under performance constraints.Read
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- By Rabindra Ku. Jena & Gopal K. Sharma
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