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eInfochips' Corner
Technology Showcase
Getting started with Linux: Debugging
Programming in Linux for the first time, unable
to find F10, F11 and visual breakpoints? Here are few techniques and thoughts
which can speed up debugging, minimize errors and make you (newbie) comfortable
in Linux. Read
more... - By Shreshtha Kumar | Partner Showcase
Image pipeline: Fine-tuning digital camera processing blocks
Fine tuning the digital camera
design is perhaps more art than science because it frequently involves subjective
interpretations of quality. Read
More... - By Jianping Zhou, Texas
Instruments  |
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Featured
Success Story | |
| Video
on Demand application for Set-Top Box
This application allows users
to play video files on a PC browser or TV. The application streams synchronized
audio/video files over PCI/Ethernet. more... |
1. Defining standard Debug Interface
Socket requirements for OCP-Compliant multicore SoCs : Part 1
Enabling a robust on-chip debug capability is being
recognized as an important Design for Debug (DFD) capability for complex SoC and
having DFD standardization makes the Open Core Protocol (OCP) more attractive
as a SoC platform. Read
More... - By Neal Stollon, Bob Uvacek, Gilbert Laurenti 2.
A Heuristic Energy Aware Application Mapping algorithm for Network on Chip
In this paper we have introduced a heuristic algorithm which automatically
maps a given set of intellectual property onto a generic regular network-on-chip
(NoC) architecture and constructs a deterministic routing function such that the
total communication energy is minimized. Read
More...
- By Armin Mehran, Ahmad Khademzadeh, Ali Afzali-Kusha, Babak
Shirpour
3. Multicore microprocessors and embedded multicore SOCs
have very different needs
SMP and AMP approaches with and without
shared memory can be used to solve processing problems that are beyond the capabilities
of an individual microprocessor. Read
More...
- By Steve Leibson 4.
Achieving scalability with switch fabrics in CompactPCI
CompactPCI
has a rich history in embedded design; a logical step to extending its capabilities
is adding a switch fabric architecture to your current product line. Read
More...
- By Tom Cox 5.
Measurable Verification Methodology for Highly Configurable IP Cores
This paper describes the methodology based on use of
functional coverage technology for measurement of quality of IP. In this methodology,
the regressions are run on RTL generated by selecting hard configuration parameters
randomly. Read
More...
- By Vishal Namshiker | 
