eInfochips Participates in Verisity Seminar Series for Advanced Verification Methodologies

Seminars Feature Coverage-Based Verification, Assertion Creation, Verification Reuse and Testbench Acceleration

MILPITAS, CA - September 16, 2002 - eInfochips, a leading verification component developer and consulting firm, today announced that they are participating in Verisity's worldwide 'Get Real' verification seminars. Verisity Ltd., (Nasdaq:VRST), the leader in verification methodology, is hosting the seminar series showcasing the latest in functional verification technology and methodology. Running from September 12 to November 19, the seminars present in-depth, technical information on the critical aspects and approaches involved in functional verification today. eInfochips will present a case study that explains how these valuable verification techniques were used on a real-world design to help their clients accelerate time to market while increasing productivity and quality. eInfochips' engineers will share their experiences on the successful verification of complex IC, SoCs and system designs.

An overview of the evolution of verification methodologies will be featured, reviewing the shortcomings of older approaches and highlighting the path of least resistance for automating functional verification. Attendees will have the opportunity to measure themselves against the Verification Maturity Scale.

Attendees will be taught a step-by-step approach to verification methodologies and implementation using Verisity's market-proven tools and techniques. Concepts in verification reuse, interoperability and test bench acceleration are new to the seminar series this year. Both first-time participants and previous attendees will gain valuable insight into the world of functional verification and see Verisity's solutions in action.

Attendees will learn:

• Verification strategies including test plan creation
• A coverage-based approach to functional verification
• Using assertions and how they fit into today's overall testbench strategy
• How to automate the verification process by quickly developing a smart testbench, including directed random generation strategies, scoreboarding, assertions, and functional coverage techniques
• Verification reuse, facilitated by verification components and methodology to improve interoperability
• Methodologies for accelerating test benches

This seminar was developed for those interested in learning about automating their functional verification. Managers and engineers who are responsible for functional verification using a simulation or emulation-based approach, and anyone interested in strategies for verification reuse, would benefit from attending this seminar.

The verification methodology seminars will be held in North America in September, Europe in October and Asia in November. To obtain more details or register for the seminar in your area, please visit www.verisity.com. You can also register by sending an email to seminars@verisity.com

About Verisity

Verisity is the leading provider of proprietary technologies and software products used to efficiently verify designs of electronic systems and complex integrated circuits that are essential to high growth segments of the electronics industry. Verisity's products automate the process of detecting flaws in these designs, enabling customers to deliver higher quality products, accelerate time-to-market and reduce overall product development costs.

Verisity Design, Inc.'s principal executive offices are located in Mountain View, CA. The Company's principal research and development offices are located in Rosh Ha'ain, Israel. For more information, see Verisity's web site at http://www.verisity.com

About eInfochips

eInfochips delivers high-quality services based on Hardware Verification Languages (HVLs), which enable customers to compete effectively in their target markets and to widen their client base by dramatically reducing the time-to-verify. It has a large team of engineers dedicated to reusable Verification IP development. eInfochips' expertise with HVLs, test bench automation tools and the various eVCs that they have designed help the design and verification engineers to devise verification models and methodologies, with highest efficiency in the shortest time.

eInfochips' engineering teams in India and the USA have considerable experience at designing and verifying complex ASICs, IP/Cores, System-on-Chip and custom ICs, vast exposure to EDA tools & HVL based verification methodologies. eInfochips' commonly works on chip designs all the way through to tape-out. eInfochips partners with cutting edge technology companies to meet the ever-emerging customer needs for design and verification services. For more information on eInfochips visit http://www.einfochips.com or send email to evcmarketing@einfochips.com

For more information contact:
Parag Mehta eInfochips, Inc.
(408) 263-2505
parag@einfochips.com