eInfochips Announces PCI Express e Verification Component

New eVC to Accelerate Verification of PCI Express Based Chips

INTEL DEVELOPER FORUM, SAN JOSE, CA - September 09, 2002- eInfochips, a leading verification component developer and consulting firm, and Verisity Ltd. (Nasdaq: VRST), the leading provider of functional verification automation tools, today jointly announced they are working with Intel Corporation to deliver a PCI Express e Verification Component (eVC™). eInfochips, a member of Verisity's Verification Alliance™ partners program, will develop the eVC. To ensure that the eVC delivers complete protocol checking, Intel plans to provide PCI-Express enabling tools to eInfochips. Verisity will certify the eVC's compliance with the e Reuse Methodology (eRM™) to ensure that it will plug-and-play with all other eRM compliant eVCs [see the related release: "Verisity Announces e Reuse Methodology", dated September 9, 2002].

eVCs are reusable plug-and-play verification components for standard protocols and interfaces. They are based on Verisity's high-level verification language, e, and the Specman Elite™ testbench automation tool. eVCs comprise a complete verification environment including stimulus generation, checking and monitoring, and functional coverage analysis. eVCs are configurable and extensible to satisfy each specific verification environment's requirements. As with all eVCs, the PCI Express eVC will shorten the time needed to create a verification environment as well as improve chip quality.

"eInfochips Inc. is at the forefront of advanced verification methodologies and is a highly experienced eVC developer. PCI Express will be our fifth eVC," stated Pratul Shroff, CEO of eInfochips. "We have already delivered our PCI-X eVC to many satisfied customers and we are pleased to be working with Intel to develop the PCI Express eVC. It should inspire confidence that we are verifying the eVC against Intel's PCI-Express technology. Being a close partner with Verisity, the creators of the eVC concept and the e Reuse Methodology (eRM), is also key to the successful delivery of the PCI Express eVC."

"The industry is moving forward with the transition across platforms to PCI Express," said Jason Ziller, Intel Technology Initiatives Manager. "PCI Express provides the performance and system design flexibility required for the present and next generation computing and communications platform component interconnects while also providing a long-term path to improved I/O slots. We look forward to working with eInfochips on their development of PCI-Express verification components."

Verification IP has become a strategic asset for our customers," explained Pete Heller, eVC Product Line Manager for Verisity. "eInfochips' PCI Express eVC will be a very important component within the verification environment for designs employing the PCI Express standard. We are also pleased to be working with eInfochips as they migrate all their eVCs to comply with Verisity's e Reuse Methodology (eRM). This will ensure that all eVCs will plug-and-play and behave consistently."

About PCI Express eVC

eInfochips' PCI Express eVC will be a ready-made highly configurable e verification component suitable for any DUT that interfaces with a PCI Express bus. It is easy to configure and integrate with each specific ASIC. The eInfochips PCI Express eVC leverages the power of Specman Elite and its associated verification methodology to develop a robust verification environment in the least possible time and to ensure that the protocol is thoroughly exercised. The eVC includes a set of the behavioral models and test suites written in the e language. The models are tools for system designers to exercise and debug the design of components and/or systems based on the PCI Express standard.

The environment will include models of PCI Express master and target devices, a PCI Express arbiter to control bus access, a protocol and timing monitor to check for and report protocol violations and functional coverage analysis. In addition a full suite of compliance test scenarios to verify compliance to PCI Express specification will be provided with the eVC.

Pricing and Availability

eInfochips' PCI Express eVC will be a available in the fourth quarter of 2002. The list price for a single annual time based license is $15,000. Discounts are available for multiple unit licenses.

About e Verification Components

Over 30 eVCs are available for a variety of standard protocols, interfaces and processors. Each eVC comprises a complete verification environment including stimulus generation, checking and monitoring, and functional coverage analysis. They are configurable and extensible to suit the needs of each specific verification environment. In addition, a variety of eVCs can be intermixed within a single verification environment. To ensure that all eVCs plug-and-play and behave consistently, Verisity has created the e Reuse Methodology (eRM), which defines the standards for architecting, coding and packaging eVCs.

eVCs provide numerous advantages to verification teams including a major increase in productivity and higher quality products. With eVCs, verification environments are created in days instead of months. Simulation can begin much earlier and complete verification faster. eVCs also reduce the need for deep protocol expertise on the verification team. eVCs also greatly enhance verification reuse since they are easily moved from module-level to chip-level verification efforts as well as from design project to project. Visit http://www.verisity.com/products/evc.html. for a complete listing of available eVCs.

About Intel

Intel, the world's largest chip maker, is also a leading manufacturer of computer, networking and communications products. Additional information about Intel is available at www.intel.com/pressroom.

About eInfochips

eInfochips delivers high-quality services based on Hardware Verification Languages (HVLs), which enable customers to compete effectively in their target markets and to widen their client base by dramatically reducing the time-to-verify. It has a large team of engineers dedicated to reusable Verification IP development. eInfochips' expertise with HVLs, test bench automation tools and the various eVCs that they have designed help the design and verification engineers to devise verification models and methodologies, with highest efficiency in the shortest time.

eInfochips' engineering teams in India and the USA have considerable experience at designing and verifying complex ASICs, IP/Cores, System-on-Chip and custom ICs, vast exposure to EDA tools & HVL based verification methodologies. eInfochips' commonly works on chip designs all the way through to tape-out. eInfochips partners with cutting edge technology companies to meet the ever-emerging customer needs for design and verification services. For more information on eInfochips visit http://www.einfochips.com or send email to parag@einfochips.com

About Verisity

Verisity is the leading provider of proprietary technologies and software products used to efficiently verify designs of electronic systems and complex integrated circuits that are essential to high growth segments of the electronics industry. Verisity's products automate the process of detecting flaws in these designs, enabling customers to deliver higher quality products, accelerate time-to-market and reduce overall product development costs.

Verisity Design, Inc.'s principal executive offices are located in Mountain View, CA. The Company's principal research and development offices are located in Rosh Ha'ain, Israel. For more information, see Verisity's web site at http://www.verisity.com

For more information contact:

Ric Chope
Verisity Design, Inc.
(650) 934-6820
ric@verisity.com

Parag Mehta
eInfochips, Inc.
(408) 263-2505
parag@einfochips.com