SPI (Serial Peripheral Interface) is a serial synchronous communication protocol developed by Motorola for M68HC11 family CPUs. SPI OVM Compliant VC can be used to verify Master or Slave devices following the SPI basic protocol as defined in Motorola’s M68HC11 user manual rev 5.0. It can work with Verilog HDL environment and with all Verilog simulators that are supported by Specman Elite.

OVM Compliant Compliant Verification Component Overview

OVM Compliant VCs are reusable and can be used to establish ready-made verification environment. Each OVM Compliant VC is capable of acting as full verification environment or as a plug-in to an existing environment. eInfochips' OVM Compliant VC’s are designed for verification of today's SoC designs. With their object-oriented architecture, eInfochips' OVM Compliant VCs are building blocks for establishing complex and comprehensive verification environment in very short time. These VCs are

• Flexible to integrate several OVM Compliant VCs
• Extensible for future upgrades with changing technology
• Configurable for quick orientation to your deployment
• Customizable for particular requirements

Features

• Follows SPI basic specification as defined in M68HC11 user manual rev 5.0
• Support Master and Slave Mode
• Support baud rate selection
• Support internal clock division check
• Support clock polarity selections
  

Configurable Verification Environment

Configurable test environment is available to verify the functional compliance to SPI standards. The SPI test environment provides user generated or random generated data injection to DUT. The test suits covers all type of possible scenarios outlined in SPI specification.