The Serial ATA protocol, is a high-speed serial link replacement for parallel ATA for storage applications. It reduces controller chip power consumption which lowers the voltage interface signaling requirement. This allows for platform cost reductions and performance improvements.
eInfochips' Serial ATA SystemC VC (Verification Component) is used for designs with Serial ATA interface. This performs module level verification and can be scaled to verify SATA design in a system. The verification component incorporates functionality of Serial ATA host and device and integrates monitors, global scoreboard and reference model. These ensure that the DUT adheres to Serial ATA specifications. It implements Transport and Link Layer protocol functionalities in BFM.
Verification Component Overview
The SystemC VC (Verification Component) has an object oriented architecture that allows easy extensibility and reusability. It performs fast simulation that aids in quick design verification and optimization. The VC is used to establish a complete Verification Environment, or as a plug-in to an existing environment for system level verification.
eInfochips’ Serial ATA VC (Verification Component), developed in SystemC, offers a verification solution for SATA I, II (host and device) compliant cores.
Features
- Programmable as SATA Host and Device model
- Compliant to SATA rev 1.0a and SATA II rev 1.1 specifications
- Supports Native Command Queuing
- Supports 10, 20, 40 bit link interface
- Configurable pattern generation for random, directed or erroneous patterns
- End-to-end data checking support, using scoreboard
- protocol timing checks and functional accuracy verification Supports
- Supports error injection at various levels and layers
- Optional support for layer wise DUT Verification
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