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FPGA Prototyping & Chip Bring Up

Embedded systems
Application Software
AHB-to-APB Bridge Core

AHB-to-APB Bridge interfaces AHB and APB buses. It is required to bridge the communication gap between low bandwidth peripherals on APB with the high bandwidth AHB.

Normally APB works without pipelining of address. The bridge is used to control the AHB such that it can halt for a particular number of cycles and synchronization is maintained. This is to ensure that there is no data loss between AHB to APB or APB to AHB data transfers.

Features

  • Compliant to AMBA specifications 2.0
  • Supports sequential and non-sequential data transfer on AHB side
  • Supported data and address buswidths: 8, 16, 32, 64 bits. Default is 32
  • Parameterized no. of slaves: maximum slaves are 16
  • APB data bus is configurable as tristate or bi-directional read/write separate buse

 




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