The I2C (Inter-Integrated Circuit) Bus is a two-wire, low to medium speed, communication bus (a path for electronic signals) developed by Philips Semiconductors. The bus provides a communication link between integrated circuits. Its applications include volume and contrast control in radios and televisions.

OVM Ready Verification Component Overview

A DUT with an I2C interface can be verified with a single I2C OVM Ready VC, configured appropriately. I2C OVM Ready VC is fully configurable and easy to use for both module and system-level verification. It can be configured to emulate a single master or single slave device. It can also emulate the entire I2C bus system with multiple devices.

Features

eInfochips’ I2C OVM Ready Verification IP is fully compliant with version 2.1 of the Philip’s I2C-Bus Specification and provides the following features:

• Supports standard, fast, and high speed operations. The model has a rich set of configuration parameters to set clock synchronization and generation of the Serial Clock Line (SCL) to meet all clocking requirements.
• Detects and notifies the testbench of all protocol errors.
• Contains many configurable features including the SCL’s period and duty cycle, slave addresses, transfer abort, command retries, and data FIFO depths.
• Significant model events trigger the testbench through the use of notifications.