eVCs are reusable Verification Components that can be used to establish ready-made verification environment. Each eVC is capable of acting as full verification environment or as a plug-in to an existing environment.
eInfochips' eVCs are designed for verification of today's SoC designs. With their object-oriented architecture, eInfochips' eVCs are building blocks for establishing complex and comprehensive verification environment in very short time.
Description
PCI-X eVC can be used for verification of any Peripheral Component Interconnect (PCI) agent across all levels of abstraction. It works with all HDL simulators that are supported by Specman Elite™.
Features
- PCI-X Bus Specification Revision 1.0a
- Functions as one or more of:
- Agent acting as target only
- Agent acting as target and master
- Arbiter
- Generates all types of PCI/PCI-X transactions (master) and responses (target)
- Supports memory modeling of all agent memory spaces (configuration/IO/ Memory)
- Supports 32-bit and 64-bit transactions
- Supports Power Management option
- Supports Message Signaled Interrupt handling option
- Supports Single Address Cycle (SAC) and Dual Address Cycle (DAC) transactions
- Procedural interface (API methods) that allows a more directed scheme of transaction sending, specifically of configuration transactions
- Built-in bus traffic monitor
- Built-in coverage analysis for transfer types
- Scoreboard checking of input/output
- HDL independent