eInfochips' VMM based MIPI CSI-2 SystemVerilog VIP is compliant to the CSI-2 MIPI Specification for Camera Serial Interface Version 1.00 and DRAFT MIPI Alliance Standard for D-PHY Version 0.85.00. MIPI Specifications establish standards for hardware and software interfaces between the processors and peripherals typically found in mobile terminal systems.
The MIPI CSI-2 VIP is an interface between a digital imaging module such as a host processor and image sensor peripheral such as a camera. It is available as a CSI-2 Receiver or Transmitter VIP. eInfochips’ MIPI CSI-2 VIP is based on the layered architecture of object oriented programming that allows coverage driven verification suitable for verifying transmitter and receiver with either of them as DUT.
The VMM based MIPI CSI-2 VIP is a readymade, highly configurable, SystemVerilog Verification IP suitable for verification of MIPI CSI-2 Transmitter/ Receiver/ Transmitter with D-PHY/ Receiver with D-PHY/ D-PHY/ Transmitter and Receiver with D-PHY DUTs and for coverage measurement. The VIP can be easily configured and integrated with the verification environment.