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Semiconductor Services
eInfochips' semiconductor design practice in Networking & Telecommunication has benefited several established global technology houses and innovation-based start-up to launch their products successfully in the market. Our strong expertise across segments and sub-segments like wired and wireless, optical, etc. has been built over the years.
Our in-depth semiconductor design practice in Networking & Telecom product development includes
FPGA Design
- FPGA development for Audio-Video Distribution System designed to distribute a TCP/IP uncompressed A/V Stream through a Standard Gigabit TCP/IP Network
- Design & Verification of video streaming FPGA with 10 Gigabit Ethernet MAC & XAUI 7.2V Xilinx IP cores
- Design and Verification of multiple networking FPGAs for Telecom Network Switch
- Design and Implementation of Ethernet Test Pattern Generator FPGA with multiple 1G / 10G Ports
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Verification
- Full Chip Verification and Validation of OC-48 Framer + Multi-channel HDLC Communications Controller + ATM Cell Delineator Chip of 35 Million gate density
- Verification of DSP-based SoC that employs Voice over Packet (VoP) technology to deliver high-quality voice, fax, and data communications over next-generation optical networks
- Verification of High Speed Router SoC for complete data path platform solution for OC192c/10G Ethernet and beyond for the next generation Internet infrastructure
- Verification of Network Co-processor for VPN devices, bandwidth managers (up to OC192c), fast firewalls, core switch routers, access routers, VoIP devices and network probes
- Verification of WLAN PHY IP using OVM
- Verification of Multi-platform Enterprise Network Chip used in Metro Networks between the enterprise LAN and the carrier WAN/backbone
- Full Chip Verification of intelligent storage network processor encompassing front-end, back-end, and standalone appliance solutions
- Full Chip Verification & System-Level Testing of RFID Chipset
Physical Design
- Netlist to GDSII Implementation of 40nm, 90nm PCI Express switch chips
- Netlist to GDSII Implementation of 40nm, 65nm networking chips for wireless router
- Physical Design of 90nm Programmable High Speed Networking Switch
- RTL to GDSII Implementation of 0.18µm RFID Chip
IP Development
- Design IP development for SONET/SDH and Gigabit Ethernet applications
- Verification IP development and maintenance for various Gigabit Ethernet interfaces
