SDIO HOST VMM based Verification IP

Overview

The Secure Digital Input Output (SDIO) interface is a card interface defined to connect a SD Host Controller with four different types of cards, namely SDIO card, SD memory card, SD Combo card and SD Multimedia Card (MMC). SDIO is a master-slave protocol, where SD Host Controller, as a master, performs various operations like card detection, card initialization, card selection, card register read/write and also some other special operations.

eInfochips' VMM based SDIO HOST Verification IP (VIP) allows coverage driven verification and it is designed to verify all four types of cards mentioned above.

Application

SDIO HOST VIP can be configured as IO-aware host or non IO-aware host and it allows verification of SDIO card, SD memory card, SD Combo card and MMC.

Features

  • VMM based (uses SV Test bench , VMM library and VCS version Y-2006.06-SP1-1 )
  • Compliant to SD Host Specification 1.0 except register space implementation and host driver operations (host driver interface)
  • Compliant to SD Specification 1.10 and 2.00 and to SDIO Specification 1.2
  • Support for SDIO, SD Memory, SD Combo card and MMC
  • Supports single slot operation
  • Easily configurable to work as SDIO aware or non-SDIO aware host controller
  • Supports card detection on DAT [3] line in SD mode and CS line in SPI mode. Pull- Up/logic high on this indicates insertion of card
  • Support for re-initializing combo card in either SDIO only mode or SD memory only mode
  • Command level support for resetting the card, setting bus width and changing bus mode (SD to SPI)
  • Supports 1-bit, 4-bit, 8-bit (for MMC Only) SD bus mode and SPI bus mode
  • Supports low speed mode, full speed mode and high speed mode of operation
  • Supports single byte ,single block ,multiple block (finite and infinite ) transfers
  • Supports stream transfer for MMC
  • Supports direct command during data transfer, for SD mode only
  • Supports read wait operation. It allows read wait control by stopping clock and by asserting dat[2] line low
  • Supports transfer synchronous abort and asynchronous abort
  • Supports card Suspend/Resume operation
  • Supports card lock-unlock and erase operations
  • Provides support for card SD 1-bit and SPI mode interrupt and SD 4-bit mode interrupt(both regular interrupt and interrupt between multiple block operation)
  • Support for SDIO Clock disable and wake up through interrupt
  • Support Functional coverage to enable user to have coverage driven verification
  • Provides monitor and self checker models that enable protocol checking and
    transaction level checking
  • All SDIO Command and SD Command support
  • It can be easily integrated with Verification Environment to support plug and play use

Possible User Constraint

  • User can constraint configuration class to verify particular card
  • Provision to give constraint to all kind of SDIO transactions
  • User can inject bus level and transaction level errors using callbacks
  • Provision of a user port to enable user to provide his/her own transaction and data, and get feedback with transaction status/response

Deliverables

  • Completely verified SDIO HOST Verification IP encrypted code
  • Documentation – User Guide, Release Notes
  • Sample Test cases